1 /*- 2 * Copyright (c) 2011 NetApp, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _VMM_LAPIC_H_ 30 #define _VMM_LAPIC_H_ 31 32 struct vm; 33 34 boolean_t lapic_msr(u_int num); 35 int lapic_rdmsr(struct vm *vm, int cpu, u_int msr, uint64_t *rval, 36 bool *retu); 37 int lapic_wrmsr(struct vm *vm, int cpu, u_int msr, uint64_t wval, 38 bool *retu); 39 40 int lapic_mmio_read(void *vm, int cpu, uint64_t gpa, 41 uint64_t *rval, int size, void *arg); 42 int lapic_mmio_write(void *vm, int cpu, uint64_t gpa, 43 uint64_t wval, int size, void *arg); 44 45 /* 46 * Signals to the LAPIC that an interrupt at 'vector' needs to be generated 47 * to the 'cpu', the state is recorded in IRR. 48 */ 49 int lapic_set_intr(struct vm *vm, int cpu, int vector, bool trig); 50 51 #define LAPIC_TRIG_LEVEL true 52 #define LAPIC_TRIG_EDGE false 53 static __inline int 54 lapic_intr_level(struct vm *vm, int cpu, int vector) 55 { 56 57 return (lapic_set_intr(vm, cpu, vector, LAPIC_TRIG_LEVEL)); 58 } 59 60 static __inline int 61 lapic_intr_edge(struct vm *vm, int cpu, int vector) 62 { 63 64 return (lapic_set_intr(vm, cpu, vector, LAPIC_TRIG_EDGE)); 65 } 66 67 /* 68 * Triggers the LAPIC local interrupt (LVT) 'vector' on 'cpu'. 'cpu' can 69 * be set to -1 to trigger the interrupt on all CPUs. 70 */ 71 int lapic_set_local_intr(struct vm *vm, int cpu, int vector); 72 73 int lapic_intr_msi(struct vm *vm, uint64_t addr, uint64_t msg); 74 75 #endif 76