1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011 NetApp, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _VMM_LAPIC_H_ 30 #define _VMM_LAPIC_H_ 31 32 struct vcpu; 33 struct vm; 34 35 bool lapic_msr(u_int num); 36 int lapic_rdmsr(struct vcpu *vcpu, u_int msr, uint64_t *rval, bool *retu); 37 int lapic_wrmsr(struct vcpu *vcpu, u_int msr, uint64_t wval, bool *retu); 38 39 int lapic_mmio_read(struct vcpu *vcpu, uint64_t gpa, 40 uint64_t *rval, int size, void *arg); 41 int lapic_mmio_write(struct vcpu *vcpu, uint64_t gpa, 42 uint64_t wval, int size, void *arg); 43 44 /* 45 * Signals to the LAPIC that an interrupt at 'vector' needs to be generated 46 * to the 'cpu', the state is recorded in IRR. 47 */ 48 int lapic_set_intr(struct vcpu *vcpu, int vector, bool trig); 49 50 #define LAPIC_TRIG_LEVEL true 51 #define LAPIC_TRIG_EDGE false 52 static __inline int 53 lapic_intr_level(struct vcpu *vcpu, int vector) 54 { 55 56 return (lapic_set_intr(vcpu, vector, LAPIC_TRIG_LEVEL)); 57 } 58 59 static __inline int 60 lapic_intr_edge(struct vcpu *vcpu, int vector) 61 { 62 63 return (lapic_set_intr(vcpu, vector, LAPIC_TRIG_EDGE)); 64 } 65 66 /* 67 * Triggers the LAPIC local interrupt (LVT) 'vector' on 'cpu'. 'cpu' can 68 * be set to -1 to trigger the interrupt on all CPUs. 69 */ 70 int lapic_set_local_intr(struct vm *vm, struct vcpu *vcpu, int vector); 71 72 int lapic_intr_msi(struct vm *vm, uint64_t addr, uint64_t msg); 73 74 #endif 75