1.\"- 2.\" SPDX-License-Identifier: BSD-2-Clause 3.\" 4.\" Copyright (c) 2020 Denis Salopek 5.\" 6.\" Redistribution and use in source and binary forms, with or without 7.\" modification, are permitted provided that the following conditions 8.\" are met: 9.\" 1. Redistributions of source code must retain the above copyright 10.\" notice, this list of conditions and the following disclaimer. 11.\" 2. Redistributions in binary form must reproduce the above copyright 12.\" notice, this list of conditions and the following disclaimer in the 13.\" documentation and/or other materials provided with the distribution. 14.\" 15.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 16.\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18.\" ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 19.\" LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 20.\" CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 21.\" SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 22.\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 23.\" CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 24.\" ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25.\" POSSIBILITY OF SUCH DAMAGE. 26.\" 27.Dd August 30, 2020 28.Dt SUME 4 29.Os 30.Sh NAME 31.Nm sume 32.Nd "NetFPGA SUME 4x10Gb Ethernet driver" 33.Sh SYNOPSIS 34To compile this driver into the kernel, place the following lines 35in your kernel configuration file: 36.Bd -ragged -offset indent 37.Cd "device sume" 38.Ed 39.Pp 40Alternatively, to load the driver as a module at boot time, place 41the following line in 42.Xr loader.conf 5 : 43.Bd -literal -offset indent 44if_sume_load="YES" 45.Ed 46.Sh DESCRIPTION 47The 48.Nm 49driver provides support for NetFPGA SUME Virtex-7 FPGA Development Board 50with the reference NIC bitstream loaded onto it. 51The HDL design for the reference NIC project uses the RIFFA based DMA 52engine to communicate with the host machine over PCIe. 53Every packet is transmitted to / from the board via a single DMA 54transaction, taking up to two or three interrupts per one transaction 55which yields low performance. 56.Pp 57There is no support for Jumbo frames as the hardware is capable of 58dealing only with frames with maximum size of 1514 bytes. 59The hardware does not support multicast filtering, provides no checksums, 60and offers no other offloading. 61.Sh SEE ALSO 62.Xr arp 4 , 63.Xr netgraph 4 , 64.Xr netintro 4 , 65.Xr ng_ether 4 , 66.Xr vlan 4 , 67.Xr ifconfig 8 68.Sh AUTHORS 69The Linux 70.Nm 71driver was originally written by 72.An -nosplit 73.An Bjoern A. Zeeb . 74The 75.Fx version and this manual page were written by 76.An Denis Salopek 77as a GSoC project. 78More information about the project can be found here: 79.Pa https://wiki.freebsd.org/SummerOfCode2020Projects/NetFPGA_SUME_Driver 80.Sh BUGS 81The reference NIC hardware design provides no mechanism for quiescing 82inbound traffic from interfaces configured as DOWN. 83All packets from administratively disabled interfaces are transferred to 84main memory, leaving the driver with the task of dropping such packets, 85thus consuming PCI bandwidth, interrupts and CPU cycles in vain. 86.Pp 87Pre-built FPGA bitstream from the NetFPGA project may not work correctly. 88At higher RX packet rates, the newly incoming packets can overwrite the 89ones in an internal FIFO so the packets would arrive in main memory 90corrupted, until a physical reset of the board. 91.Pp 92Occasionally, the driver can get stuck in a non-IDLE TX state due to 93a missed interrupt. 94The driver includes a watchdog function which monitors for such a 95condition and resets the board automatically. 96For more details, visit the NetFPGA SUME project site. 97