xref: /freebsd/share/man/man4/hifn.4 (revision d65cd7a57bf0600b722afc770838a5d0c1c3a8e1)
1.\"	$OpenBSD: hifn.4,v 1.32 2002/09/26 07:55:40 miod Exp $
2.\"
3.\" Copyright (c) 2000 Theo de Raadt
4.\" All rights reserved.
5.\"
6.\" Redistribution and use in source and binary forms, with or without
7.\" modification, are permitted provided that the following conditions
8.\" are met:
9.\" 1. Redistributions of source code must retain the above copyright
10.\"    notice, this list of conditions and the following disclaimer.
11.\" 2. Redistributions in binary form must reproduce the above copyright
12.\"    notice, this list of conditions and the following disclaimer in the
13.\"    documentation and/or other materials provided with the distribution.
14.\"
15.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17.\" WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18.\" DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19.\" INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20.\" (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21.\" SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24.\" ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25.\" POSSIBILITY OF SUCH DAMAGE.
26.\"
27.\" $FreeBSD$
28.\"
29.Dd May 11, 2020
30.Dt HIFN 4
31.Os
32.Sh NAME
33.Nm hifn
34.Nd Hifn 7751/7951/7811/7955/7956 crypto accelerator
35.Sh SYNOPSIS
36To compile this driver into the kernel,
37place the following lines in your
38kernel configuration file:
39.Bd -ragged -offset indent
40.Cd "device crypto"
41.Cd "device cryptodev"
42.Cd "device hifn"
43.Ed
44.Pp
45Alternatively, to load the driver as a
46module at boot time, place the following line in
47.Xr loader.conf 5 :
48.Bd -literal -offset indent
49hifn_load="YES"
50.Ed
51.Sh DESCRIPTION
52The
53.Nm
54driver supports various cards containing the Hifn 7751, 7951,
557811, 7955, and 7956 chipsets.
56.Pp
57The
58.Nm
59driver registers itself to accelerate
60AES (7955 and 7956 only),
61SHA1, and SHA1-HMAC operations for
62.Xr ipsec 4
63and
64.Xr crypto 4 .
65.Pp
66The Hifn
67.Tn 7951 ,
68.Tn 7811 ,
69.Tn 7955 ,
70and
71.Tn 7956
72will also supply data to the kernel
73.Xr random 4
74subsystem.
75.Sh HARDWARE
76The
77.Nm
78driver supports various cards containing the Hifn 7751, 7951,
797811, 7955, and 7956
80chipsets, such as:
81.Bl -tag -width namenamenamena -offset indent
82.It Invertex AEON
83No longer being made.
84Came as 128KB SRAM model, or 2MB DRAM model.
85.It Hifn 7751
86Reference board with 512KB SRAM.
87.It PowerCrypt
88Comes with 512KB SRAM.
89.It XL-Crypt
90Only board based on 7811 (which is faster than 7751 and has
91a random number generator).
92.It NetSec 7751
93Supports the most IPsec sessions, with 1MB SRAM.
94.It Soekris Engineering vpn1201 and vpn1211
95See
96.Pa http://www.soekris.com/ .
97Contains a 7951 and supports symmetric and random number operations.
98.It Soekris Engineering vpn1401 and vpn1411
99See
100.Pa http://www.soekris.com/ .
101Contains a 7955 and supports symmetric and random number operations.
102.El
103.Sh SEE ALSO
104.Xr crypt 3 ,
105.Xr crypto 4 ,
106.Xr intro 4 ,
107.Xr ipsec 4 ,
108.Xr random 4 ,
109.Xr crypto 9
110.Sh HISTORY
111The
112.Nm
113device driver appeared in
114.Ox 2.7 .
115The
116.Nm
117device driver was imported to
118.Fx 5.0 .
119.Sh CAVEATS
120The Hifn 9751 shares the same PCI ID.
121This chip is basically a 7751, but with the cryptographic functions missing.
122Instead, the 9751 is only capable of doing compression.
123Since we do not currently attempt to use any of these chips to do
124compression, the 9751-based cards are not useful.
125.Pp
126Support for the 7955 and 7956 is incomplete; the asymmetric crypto
127facilities are to be added and the performance is suboptimal.
128.Sh BUGS
129The 7751 chip starts out at initialization by only supporting compression.
130A proprietary algorithm, which has been reverse engineered, is required to
131unlock the cryptographic functionality of the chip.
132It is possible for vendors to make boards which have a lock ID not known
133to the driver, but all vendors currently just use the obvious ID which is
13413 bytes of 0.
135