1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #ifndef _FENV_H_ 30 #define _FENV_H_ 31 32 #include <sys/_types.h> 33 #include <machine/endian.h> 34 35 #ifndef __fenv_static 36 #define __fenv_static static 37 #endif 38 39 typedef __uint32_t fenv_t; 40 typedef __uint32_t femode_t; 41 typedef __uint32_t fexcept_t; 42 43 /* Exception flags */ 44 #define FE_INEXACT 0x02000000 45 #define FE_DIVBYZERO 0x04000000 46 #define FE_UNDERFLOW 0x08000000 47 #define FE_OVERFLOW 0x10000000 48 #define FE_INVALID 0x20000000 /* all types of invalid FP ops */ 49 50 /* 51 * The PowerPC architecture has extra invalid flags that indicate the 52 * specific type of invalid operation occurred. These flags may be 53 * tested, set, and cleared---but not masked---separately. All of 54 * these bits are cleared when FE_INVALID is cleared, but only 55 * FE_VXSOFT is set when FE_INVALID is explicitly set in software. 56 */ 57 #define FE_VXCVI 0x00000100 /* invalid integer convert */ 58 #define FE_VXSQRT 0x00000200 /* square root of a negative */ 59 #define FE_VXSOFT 0x00000400 /* software-requested exception */ 60 #define FE_VXVC 0x00080000 /* ordered comparison involving NaN */ 61 #define FE_VXIMZ 0x00100000 /* inf * 0 */ 62 #define FE_VXZDZ 0x00200000 /* 0 / 0 */ 63 #define FE_VXIDI 0x00400000 /* inf / inf */ 64 #define FE_VXISI 0x00800000 /* inf - inf */ 65 #define FE_VXSNAN 0x01000000 /* operation on a signalling NaN */ 66 #define FE_ALL_INVALID (FE_VXCVI | FE_VXSQRT | FE_VXSOFT | FE_VXVC | \ 67 FE_VXIMZ | FE_VXZDZ | FE_VXIDI | FE_VXISI | \ 68 FE_VXSNAN | FE_INVALID) 69 70 #define _FPUSW_SHIFT 22 71 #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | \ 72 FE_ALL_INVALID | FE_OVERFLOW | FE_UNDERFLOW) 73 74 /* Rounding modes */ 75 #define FE_TONEAREST 0x0000 76 #define FE_TOWARDZERO 0x0001 77 #define FE_UPWARD 0x0002 78 #define FE_DOWNWARD 0x0003 79 #define _ROUND_MASK (FE_TONEAREST | FE_DOWNWARD | \ 80 FE_UPWARD | FE_TOWARDZERO) 81 82 __BEGIN_DECLS 83 84 /* Default floating-point environment */ 85 extern const fenv_t __fe_dfl_env; 86 #define FE_DFL_ENV (&__fe_dfl_env) 87 88 /* Default floating-point control modes */ 89 extern const femode_t __fe_dfl_mode; 90 #define FE_DFL_MODE (&__fe_dfl_mode) 91 92 /* We need to be able to map status flag positions to mask flag positions */ 93 #define _ENABLE_MASK ((FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \ 94 FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT) 95 96 #ifndef _SOFT_FLOAT 97 #define __mffs(__env) \ 98 __asm __volatile("mffs %0" : "=f" ((__env)->__d)) 99 #define __mtfsf(__env) \ 100 __asm __volatile("mtfsf 255,%0" :: "f" ((__env).__d)) 101 #else 102 #define __mffs(__env) 103 #define __mtfsf(__env) 104 #endif 105 106 union __fpscr { 107 double __d; 108 struct { 109 #if _BYTE_ORDER == _LITTLE_ENDIAN 110 fenv_t __reg; 111 __uint32_t __junk; 112 #else 113 __uint32_t __junk; 114 fenv_t __reg; 115 #endif 116 } __bits; 117 }; 118 119 int feclearexcept(int); 120 int fegetexceptflag(fexcept_t *, int); 121 int fesetexceptflag(const fexcept_t *, int); 122 int feraiseexcept(int); 123 int fetestexcept(int); 124 int fegetround(void); 125 int fesetround(int); 126 int fegetmode(femode_t *); 127 int fesetmode(const femode_t *); 128 int fegetenv(fenv_t *); 129 int feholdexcept(fenv_t *); 130 int fesetenv(const fenv_t *); 131 int feupdateenv(const fenv_t *); 132 133 /* 134 * C permits a standard library function to also be exposed as a function-like 135 * macro (C23 7.1.4), and msun uses that here to inline the fast path. C++ 136 * forbids it: <cfenv> imports these names into namespace std (using 137 * ::feclearexcept; etc.), so std::feclearexcept() and friends must denote the 138 * actual functions. Expose the inlining macros to C only; C++ uses the real 139 * extern functions (defined in the matching lib/msun/<arch>/fenv.c). 140 */ 141 #ifndef __cplusplus 142 #define feclearexcept(a) __feclearexcept_int(a) 143 #define fegetexceptflag(e, a) __fegetexceptflag_int(e, a) 144 #define fesetexceptflag(e, a) __fesetexceptflag_int(e, a) 145 #define feraiseexcept(a) __feraiseexcept_int(a) 146 #define fetestexcept(a) __fetestexcept_int(a) 147 #define fegetround() __fegetround_int() 148 #define fesetround(a) __fesetround_int(a) 149 #define fegetmode(m) __fegetmode_int(m) 150 #define fesetmode(m) __fesetmode_int(m) 151 #define fegetenv(e) __fegetenv_int(e) 152 #define feholdexcept(e) __feholdexcept_int(e) 153 #define fesetenv(e) __fesetenv_int(e) 154 #define feupdateenv(e) __feupdateenv_int(e) 155 #endif /* !__cplusplus */ 156 157 __fenv_static inline int 158 __feclearexcept_int(int __excepts) 159 { 160 union __fpscr __r; 161 162 if (__excepts & FE_INVALID) 163 __excepts |= FE_ALL_INVALID; 164 __mffs(&__r); 165 __r.__bits.__reg &= ~__excepts; 166 __mtfsf(__r); 167 return (0); 168 } 169 170 __fenv_static inline int 171 __fegetexceptflag_int(fexcept_t *__flagp, int __excepts) 172 { 173 union __fpscr __r; 174 175 __mffs(&__r); 176 *__flagp = __r.__bits.__reg & __excepts; 177 return (0); 178 } 179 180 __fenv_static inline int 181 __fesetexceptflag_int(const fexcept_t *__flagp, int __excepts) 182 { 183 union __fpscr __r; 184 185 if (__excepts & FE_INVALID) 186 __excepts |= FE_ALL_INVALID; 187 __mffs(&__r); 188 __r.__bits.__reg &= ~__excepts; 189 __r.__bits.__reg |= *__flagp & __excepts; 190 __mtfsf(__r); 191 return (0); 192 } 193 194 __fenv_static inline int 195 __feraiseexcept_int(int __excepts) 196 { 197 union __fpscr __r; 198 199 if (__excepts & FE_INVALID) 200 __excepts |= FE_VXSOFT; 201 __mffs(&__r); 202 __r.__bits.__reg |= __excepts; 203 __mtfsf(__r); 204 return (0); 205 } 206 207 __fenv_static inline int 208 __fetestexcept_int(int __excepts) 209 { 210 union __fpscr __r; 211 212 __mffs(&__r); 213 return (__r.__bits.__reg & __excepts); 214 } 215 216 __fenv_static inline int 217 __fegetround_int(void) 218 { 219 union __fpscr __r; 220 221 __mffs(&__r); 222 return (__r.__bits.__reg & _ROUND_MASK); 223 } 224 225 __fenv_static inline int 226 __fesetround_int(int __round) 227 { 228 union __fpscr __r; 229 230 if (__round & ~_ROUND_MASK) 231 return (-1); 232 __mffs(&__r); 233 __r.__bits.__reg &= ~_ROUND_MASK; 234 __r.__bits.__reg |= __round; 235 __mtfsf(__r); 236 return (0); 237 } 238 239 __fenv_static inline int 240 __fegetmode_int(femode_t *__modep) 241 { 242 union __fpscr __r; 243 244 __mffs(&__r); 245 *__modep = __r.__bits.__reg & ~FE_ALL_EXCEPT; 246 return (0); 247 } 248 249 __fenv_static inline int 250 __fesetmode_int(const femode_t *__modep) 251 { 252 union __fpscr __r; 253 254 __mffs(&__r); 255 __r.__bits.__reg &= FE_ALL_EXCEPT; 256 __r.__bits.__reg |= *__modep & ~FE_ALL_EXCEPT; 257 __mtfsf(__r); 258 return (0); 259 } 260 261 __fenv_static inline int 262 __fegetenv_int(fenv_t *__envp) 263 { 264 union __fpscr __r; 265 266 __mffs(&__r); 267 *__envp = __r.__bits.__reg; 268 return (0); 269 } 270 271 __fenv_static inline int 272 __feholdexcept_int(fenv_t *__envp) 273 { 274 union __fpscr __r; 275 276 __mffs(&__r); 277 *__envp = __r.__bits.__reg; 278 __r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK); 279 __mtfsf(__r); 280 return (0); 281 } 282 283 __fenv_static inline int 284 __fesetenv_int(const fenv_t *__envp) 285 { 286 union __fpscr __r; 287 288 __r.__bits.__reg = *__envp; 289 __mtfsf(__r); 290 return (0); 291 } 292 293 __fenv_static inline int 294 __feupdateenv_int(const fenv_t *__envp) 295 { 296 union __fpscr __r; 297 298 __mffs(&__r); 299 __r.__bits.__reg &= FE_ALL_EXCEPT; 300 __r.__bits.__reg |= *__envp; 301 __mtfsf(__r); 302 return (0); 303 } 304 305 #if __BSD_VISIBLE 306 307 int feenableexcept(int); 308 int fedisableexcept(int); 309 310 #ifndef __cplusplus /* see the note above; C++ uses the real functions */ 311 #define feenableexcept(a) __feenableexcept_int(a) 312 #define fedisableexcept(a) __fedisableexcept_int(a) 313 #endif 314 315 __fenv_static inline int 316 __feenableexcept_int(int __mask) 317 { 318 union __fpscr __r; 319 fenv_t __oldmask; 320 321 __mffs(&__r); 322 __oldmask = __r.__bits.__reg; 323 __r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT; 324 __mtfsf(__r); 325 return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT); 326 } 327 328 __fenv_static inline int 329 __fedisableexcept_int(int __mask) 330 { 331 union __fpscr __r; 332 fenv_t __oldmask; 333 334 __mffs(&__r); 335 __oldmask = __r.__bits.__reg; 336 __r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT); 337 __mtfsf(__r); 338 return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT); 339 } 340 341 /* We currently provide no external definition of fegetexcept(). */ 342 static inline int 343 fegetexcept(void) 344 { 345 union __fpscr __r; 346 347 __mffs(&__r); 348 return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT); 349 } 350 351 #endif /* __BSD_VISIBLE */ 352 353 __END_DECLS 354 355 #endif /* !_FENV_H_ */ 356