1//===-- RISCVInstrInfoZvqdot.td - 'Zvqdotq' instructions ---*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file describes the RISC-V instructions from the standard 'Zvqdotq' 10// extension. 11// This version is still experimental as the 'Zvqdotq' extension hasn't been 12// ratified yet. 13// 14//===----------------------------------------------------------------------===// 15 16//===----------------------------------------------------------------------===// 17// Instructions 18//===----------------------------------------------------------------------===// 19 20let Predicates = [HasStdExtZvqdotq] in { 21 def VQDOT_VV : VALUVV<0b101100, OPMVV, "vqdot.vv">; 22 def VQDOT_VX : VALUVX<0b101100, OPMVX, "vqdot.vx">; 23 def VQDOTU_VV : VALUVV<0b101000, OPMVV, "vqdotu.vv">; 24 def VQDOTU_VX : VALUVX<0b101000, OPMVX, "vqdotu.vx">; 25 def VQDOTSU_VV : VALUVV<0b101010, OPMVV, "vqdotsu.vv">; 26 def VQDOTSU_VX : VALUVX<0b101010, OPMVX, "vqdotsu.vx">; 27 def VQDOTUS_VX : VALUVX<0b101110, OPMVX, "vqdotus.vx">; 28} // Predicates = [HasStdExtZvqdotq] 29 30 31let HasPassthruOp = true, HasMaskOp = true in { 32 def riscv_vqdot_vl : RVSDNode<"VQDOT_VL", SDT_RISCVIntBinOp_VL>; 33 def riscv_vqdotu_vl : RVSDNode<"VQDOTU_VL", SDT_RISCVIntBinOp_VL>; 34 def riscv_vqdotsu_vl : RVSDNode<"VQDOTSU_VL", SDT_RISCVIntBinOp_VL>; 35} // let HasPassthruOp = true, HasMaskOp = true 36 37multiclass VPseudoVQDOT_VV_VX { 38 foreach m = MxSet<32>.m in { 39 defm "" : VPseudoBinaryV_VV<m>, 40 SchedBinary<"WriteVIMulAddV", "ReadVIMulAddV", "ReadVIMulAddV", m.MX, 41 forcePassthruRead=true>; 42 defm "" : VPseudoBinaryV_VX<m>, 43 SchedBinary<"WriteVIMulAddX", "ReadVIMulAddV", "ReadVIMulAddX", m.MX, 44 forcePassthruRead=true>; 45 } 46} 47 48// TODO: Add pseudo and patterns for vqdotus.vx 49// TODO: Add isCommutable for VQDOT and VQDOTU 50let Predicates = [HasStdExtZvqdotq], mayLoad = 0, mayStore = 0, 51 hasSideEffects = 0 in { 52 defm PseudoVQDOT : VPseudoVQDOT_VV_VX; 53 defm PseudoVQDOTU : VPseudoVQDOT_VV_VX; 54 defm PseudoVQDOTSU : VPseudoVQDOT_VV_VX; 55} 56 57defvar AllE32Vectors = [VI32MF2, VI32M1, VI32M2, VI32M4, VI32M8]; 58defm : VPatBinaryVL_VV_VX<riscv_vqdot_vl, "PseudoVQDOT", AllE32Vectors>; 59defm : VPatBinaryVL_VV_VX<riscv_vqdotu_vl, "PseudoVQDOTU", AllE32Vectors>; 60defm : VPatBinaryVL_VV_VX<riscv_vqdotsu_vl, "PseudoVQDOTSU", AllE32Vectors>; 61 62