1//===-- RISCVInstrInfoXRivos.td ----------------------------*- tablegen -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file describes the vendor extensions defined by Rivos Inc. 10// 11//===----------------------------------------------------------------------===// 12 13class CustomRivosVXI<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins, 14 string opcodestr, string argstr> 15 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> { 16 bits<5> imm; 17 bits<5> rs1; 18 bits<5> vd; 19 bit vm = 0; 20 21 let Inst{31-26} = funct6; 22 let Inst{25} = vm; 23 let Inst{24-20} = imm; 24 let Inst{19-15} = rs1; 25 let Inst{14-12} = opv.Value; 26 let Inst{11-7} = vd; 27 let Inst{6-0} = OPC_CUSTOM_2.Value; 28 29 let Uses = [VL, VTYPE]; 30 let RVVConstraint = NoConstraint; 31 let Constraints = "$vd = $vd_wb"; 32} 33 34class CustomRivosXVI<bits<6> funct6, RISCVVFormat opv, dag outs, dag ins, 35 string opcodestr, string argstr> 36 : RVInst<outs, ins, opcodestr, argstr, [], InstFormatR> { 37 bits<5> imm; 38 bits<5> vs2; 39 bits<5> rd; 40 bit vm = 1; 41 42 let Inst{31-26} = funct6; 43 let Inst{25} = vm; 44 let Inst{24-20} = vs2; 45 let Inst{19-15} = imm; 46 let Inst{14-12} = opv.Value; 47 let Inst{11-7} = rd; 48 let Inst{6-0} = OPC_CUSTOM_2.Value; 49 50 let Uses = [VL, VTYPE]; 51 let RVVConstraint = NoConstraint; 52} 53 54//===----------------------------------------------------------------------===// 55// XRivosVizip 56//===----------------------------------------------------------------------===// 57 58 59let Predicates = [HasVendorXRivosVizip], DecoderNamespace = "XRivos", 60 Constraints = "@earlyclobber $vd", RVVConstraint = Vrgather, 61 Inst<6-0> = OPC_CUSTOM_2.Value in { 62defm RI_VZIPEVEN_V : VALU_IV_V<"ri.vzipeven", 0b001100>; 63defm RI_VZIPODD_V : VALU_IV_V<"ri.vzipodd", 0b011100>; 64defm RI_VZIP2A_V : VALU_IV_V<"ri.vzip2a", 0b000100>; 65defm RI_VZIP2B_V : VALU_IV_V<"ri.vzip2b", 0b010100>; 66defm RI_VUNZIP2A_V : VALU_IV_V<"ri.vunzip2a", 0b001000>; 67defm RI_VUNZIP2B_V : VALU_IV_V<"ri.vunzip2b", 0b011000>; 68} 69 70// These are modeled after the int binop VL nodes 71let HasMaskOp = true in { 72 def ri_vzipeven_vl : RVSDNode<"RI_VZIPEVEN_VL", SDT_RISCVIntBinOp_VL>; 73 def ri_vzipodd_vl : RVSDNode<"RI_VZIPODD_VL", SDT_RISCVIntBinOp_VL>; 74 def ri_vzip2a_vl : RVSDNode<"RI_VZIP2A_VL", SDT_RISCVIntBinOp_VL>; 75 def ri_vzip2b_vl : RVSDNode<"RI_VZIP2B_VL", SDT_RISCVIntBinOp_VL>; 76 def ri_vunzip2a_vl : RVSDNode<"RI_VUNZIP2A_VL", SDT_RISCVIntBinOp_VL>; 77 def ri_vunzip2b_vl : RVSDNode<"RI_VUNZIP2B_VL", SDT_RISCVIntBinOp_VL>; 78} 79 80multiclass RIVPseudoVALU_VV { 81 foreach m = MxList in 82 defm "" : VPseudoBinaryV_VV<m, Commutable=0>; 83} 84 85let Predicates = [HasVendorXRivosVizip], 86 Constraints = "@earlyclobber $rd, $rd = $passthru" in { 87defm PseudoRI_VZIPEVEN : RIVPseudoVALU_VV; 88defm PseudoRI_VZIPODD : RIVPseudoVALU_VV; 89defm PseudoRI_VZIP2A : RIVPseudoVALU_VV; 90defm PseudoRI_VZIP2B : RIVPseudoVALU_VV; 91defm PseudoRI_VUNZIP2A : RIVPseudoVALU_VV; 92defm PseudoRI_VUNZIP2B : RIVPseudoVALU_VV; 93} 94 95multiclass RIVPatBinaryVL_VV<SDPatternOperator vop, string instruction_name, 96 list<VTypeInfo> vtilist = AllIntegerVectors, 97 bit isSEWAware = false> { 98 foreach vti = vtilist in 99 let Predicates = GetVTypePredicates<vti>.Predicates in 100 def : VPatBinaryVL_V<vop, instruction_name, "VV", 101 vti.Vector, vti.Vector, vti.Vector, vti.Mask, 102 vti.Log2SEW, vti.LMul, vti.RegClass, vti.RegClass, 103 vti.RegClass, isSEWAware>; 104} 105 106defm : RIVPatBinaryVL_VV<ri_vzipeven_vl, "PseudoRI_VZIPEVEN">; 107defm : RIVPatBinaryVL_VV<ri_vzipodd_vl, "PseudoRI_VZIPODD">; 108defm : RIVPatBinaryVL_VV<ri_vzip2a_vl, "PseudoRI_VZIP2A">; 109defm : RIVPatBinaryVL_VV<ri_vzip2b_vl, "PseudoRI_VZIP2B">; 110defm : RIVPatBinaryVL_VV<ri_vunzip2a_vl, "PseudoRI_VUNZIP2A">; 111defm : RIVPatBinaryVL_VV<ri_vunzip2b_vl, "PseudoRI_VUNZIP2B">; 112 113//===----------------------------------------------------------------------===// 114// XRivosVisni 115//===----------------------------------------------------------------------===// 116 117let Predicates = [HasVendorXRivosVisni], DecoderNamespace = "XRivos", 118 mayLoad = false, mayStore = false, hasSideEffects = false in { 119 120let vm = 0, vs2=0, Inst<6-0> = OPC_CUSTOM_2.Value, 121 isReMaterializable = 1, isAsCheapAsAMove = 1 in 122def RI_VZERO : RVInstV<0b000000, 0b00000, OPCFG, (outs VR:$vd), 123 (ins), "ri.vzero.v", "$vd">; 124 125def RI_VINSERT : CustomRivosVXI<0b010000, OPMVX, (outs VR:$vd_wb), 126 (ins VR:$vd, GPR:$rs1, uimm5:$imm), 127 "ri.vinsert.v.x", "$vd, $rs1, $imm">; 128 129def RI_VEXTRACT : CustomRivosXVI<0b010111, OPMVV, (outs GPR:$rd), 130 (ins VR:$vs2, uimm5:$imm), 131 "ri.vextract.x.v", "$rd, $vs2, $imm">; 132} 133 134// RI_VEXTRACT matches the semantics of ri.vextract.x.v. The result is always 135// XLenVT sign extended from the vector element size. VEXTRACT does *not* 136// have a VL operand. 137def ri_vextract : RVSDNode<"RI_VEXTRACT", 138 SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<1>, 139 SDTCisInt<2>, 140 SDTCisInt<1>]>>; 141 142// RI_VINSERT_VL matches the semantics of ri.vinsert.v.x. It carries a VL operand. 143def ri_vinsert_vl : RVSDNode<"RI_VINSERT_VL", 144 SDTypeProfile<1, 5, [SDTCisSameAs<0, 1>, 145 SDTCisInt<0>, 146 SDTCisVT<2, XLenVT>, 147 SDTCisVT<3, XLenVT>, 148 SDTCisVT<4, XLenVT>]>>; 149 150let Predicates = [HasVendorXRivosVisni], mayLoad = 0, mayStore = 0, 151 hasSideEffects = 0, HasSEWOp = 1 in 152foreach m = MxList in { 153 defvar mx = m.MX; 154 let VLMul = m.value in { 155 let BaseInstr = RI_VEXTRACT in 156 def PseudoRI_VEXTRACT_ # mx : 157 Pseudo<(outs GPR:$rd), (ins m.vrclass:$rs2, uimm5:$idx, ixlenimm:$sew), 158 []>, 159 RISCVVPseudo; 160 161 let HasVLOp = 1, BaseInstr = RI_VINSERT, HasVecPolicyOp = 1, 162 Constraints = "$rd = $rs1" in 163 def PseudoRI_VINSERT_ # mx : 164 Pseudo<(outs m.vrclass:$rd), 165 (ins m.vrclass:$rs1, GPR:$rs2, uimm5:$idx, AVL:$vl, 166 ixlenimm:$sew, ixlenimm:$policy), 167 []>, 168 RISCVVPseudo; 169 } 170} 171 172 173 174foreach vti = AllIntegerVectors in 175 let Predicates = GetVTypePredicates<vti>.Predicates in { 176 def : Pat<(XLenVT (ri_vextract (vti.Vector vti.RegClass:$vs2), uimm5:$imm)), 177 (!cast<Instruction>("PseudoRI_VEXTRACT_" # vti.LMul.MX) 178 $vs2, uimm5:$imm, vti.Log2SEW)>; 179 180 def : Pat<(vti.Vector (ri_vinsert_vl (vti.Vector vti.RegClass:$merge), 181 vti.ScalarRegClass:$rs1, 182 uimm5:$imm, 183 VLOpFrag, 184 (XLenVT timm:$policy))), 185 (!cast<Instruction>("PseudoRI_VINSERT_" # vti.LMul.MX) 186 $merge, vti.ScalarRegClass:$rs1, uimm5:$imm, 187 GPR:$vl, vti.Log2SEW, (XLenVT timm:$policy))>; 188 189 } 190