1 //===- Target.h -------------------------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLD_ELF_TARGET_H 10 #define LLD_ELF_TARGET_H 11 12 #include "Config.h" 13 #include "InputSection.h" 14 #include "lld/Common/ErrorHandler.h" 15 #include "llvm/Object/ELF.h" 16 #include "llvm/Support/MathExtras.h" 17 #include <array> 18 19 namespace lld { 20 std::string toString(elf::RelType type); 21 22 namespace elf { 23 class Defined; 24 class InputFile; 25 class Symbol; 26 27 class TargetInfo { 28 public: 29 virtual uint32_t calcEFlags() const { return 0; } 30 virtual RelExpr getRelExpr(RelType type, const Symbol &s, 31 const uint8_t *loc) const = 0; 32 virtual RelType getDynRel(RelType type) const { return 0; } 33 virtual void writeGotPltHeader(uint8_t *buf) const {} 34 virtual void writeGotHeader(uint8_t *buf) const {} 35 virtual void writeGotPlt(uint8_t *buf, const Symbol &s) const {}; 36 virtual void writeIgotPlt(uint8_t *buf, const Symbol &s) const {} 37 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const; 38 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; } 39 40 // If lazy binding is supported, the first entry of the PLT has code 41 // to call the dynamic linker to resolve PLT entries the first time 42 // they are called. This function writes that code. 43 virtual void writePltHeader(uint8_t *buf) const {} 44 45 virtual void writePlt(uint8_t *buf, const Symbol &sym, 46 uint64_t pltEntryAddr) const {} 47 virtual void writeIplt(uint8_t *buf, const Symbol &sym, 48 uint64_t pltEntryAddr) const { 49 // All but PPC32 and PPC64 use the same format for .plt and .iplt entries. 50 writePlt(buf, sym, pltEntryAddr); 51 } 52 virtual void writeIBTPlt(uint8_t *buf, size_t numEntries) const {} 53 virtual void addPltHeaderSymbols(InputSection &isec) const {} 54 virtual void addPltSymbols(InputSection &isec, uint64_t off) const {} 55 56 // Returns true if a relocation only uses the low bits of a value such that 57 // all those bits are in the same page. For example, if the relocation 58 // only uses the low 12 bits in a system with 4k pages. If this is true, the 59 // bits will always have the same value at runtime and we don't have to emit 60 // a dynamic relocation. 61 virtual bool usesOnlyLowPageBits(RelType type) const; 62 63 // Decide whether a Thunk is needed for the relocation from File 64 // targeting S. 65 virtual bool needsThunk(RelExpr expr, RelType relocType, 66 const InputFile *file, uint64_t branchAddr, 67 const Symbol &s, int64_t a) const; 68 69 // On systems with range extensions we place collections of Thunks at 70 // regular spacings that enable the majority of branches reach the Thunks. 71 // a value of 0 means range extension thunks are not supported. 72 virtual uint32_t getThunkSectionSpacing() const { return 0; } 73 74 // The function with a prologue starting at Loc was compiled with 75 // -fsplit-stack and it calls a function compiled without. Adjust the prologue 76 // to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks. 77 // The symbols st_other flags are needed on PowerPC64 for determining the 78 // offset to the split-stack prologue. 79 virtual bool adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end, 80 uint8_t stOther) const; 81 82 // Return true if we can reach dst from src with RelType type. 83 virtual bool inBranchRange(RelType type, uint64_t src, 84 uint64_t dst) const; 85 86 virtual void relocate(uint8_t *loc, const Relocation &rel, 87 uint64_t val) const = 0; 88 void relocateNoSym(uint8_t *loc, RelType type, uint64_t val) const { 89 relocate(loc, Relocation{R_NONE, type, 0, 0, nullptr}, val); 90 } 91 92 // Do a linker relaxation pass and return true if we changed something. 93 virtual bool relaxOnce(int pass) const { return false; } 94 95 virtual void applyJumpInstrMod(uint8_t *loc, JumpModType type, 96 JumpModType val) const {} 97 98 virtual ~TargetInfo(); 99 100 // This deletes a jump insn at the end of the section if it is a fall thru to 101 // the next section. Further, if there is a conditional jump and a direct 102 // jump consecutively, it tries to flip the conditional jump to convert the 103 // direct jump into a fall thru and delete it. Returns true if a jump 104 // instruction can be deleted. 105 virtual bool deleteFallThruJmpInsn(InputSection &is, InputFile *file, 106 InputSection *nextIS) const { 107 return false; 108 } 109 110 unsigned defaultCommonPageSize = 4096; 111 unsigned defaultMaxPageSize = 4096; 112 113 uint64_t getImageBase() const; 114 115 // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got. 116 bool gotBaseSymInGotPlt = false; 117 118 static constexpr RelType noneRel = 0; 119 RelType copyRel; 120 RelType gotRel; 121 RelType pltRel; 122 RelType relativeRel; 123 RelType iRelativeRel; 124 RelType symbolicRel; 125 RelType tlsDescRel; 126 RelType tlsGotRel; 127 RelType tlsModuleIndexRel; 128 RelType tlsOffsetRel; 129 unsigned gotEntrySize = config->wordsize; 130 unsigned pltEntrySize; 131 unsigned pltHeaderSize; 132 unsigned ipltEntrySize; 133 134 // At least on x86_64 positions 1 and 2 are used by the first plt entry 135 // to support lazy loading. 136 unsigned gotPltHeaderEntriesNum = 3; 137 138 // On PPC ELF V2 abi, the first entry in the .got is the .TOC. 139 unsigned gotHeaderEntriesNum = 0; 140 141 bool needsThunks = false; 142 143 // A 4-byte field corresponding to one or more trap instructions, used to pad 144 // executable OutputSections. 145 std::array<uint8_t, 4> trapInstr; 146 147 // Stores the NOP instructions of different sizes for the target and is used 148 // to pad sections that are relaxed. 149 llvm::Optional<std::vector<std::vector<uint8_t>>> nopInstrs; 150 151 // If a target needs to rewrite calls to __morestack to instead call 152 // __morestack_non_split when a split-stack enabled caller calls a 153 // non-split-stack callee this will return true. Otherwise returns false. 154 bool needsMoreStackNonSplit = true; 155 156 virtual RelExpr adjustTlsExpr(RelType type, RelExpr expr) const; 157 virtual RelExpr adjustGotPcExpr(RelType type, int64_t addend, 158 const uint8_t *loc) const; 159 virtual void relaxGot(uint8_t *loc, const Relocation &rel, 160 uint64_t val) const; 161 virtual void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, 162 uint64_t val) const; 163 virtual void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, 164 uint64_t val) const; 165 virtual void relaxTlsIeToLe(uint8_t *loc, const Relocation &rel, 166 uint64_t val) const; 167 virtual void relaxTlsLdToLe(uint8_t *loc, const Relocation &rel, 168 uint64_t val) const; 169 170 protected: 171 // On FreeBSD x86_64 the first page cannot be mmaped. 172 // On Linux this is controlled by vm.mmap_min_addr. At least on some x86_64 173 // installs this is set to 65536, so the first 15 pages cannot be used. 174 // Given that, the smallest value that can be used in here is 0x10000. 175 uint64_t defaultImageBase = 0x10000; 176 }; 177 178 TargetInfo *getAArch64TargetInfo(); 179 TargetInfo *getAMDGPUTargetInfo(); 180 TargetInfo *getARMTargetInfo(); 181 TargetInfo *getAVRTargetInfo(); 182 TargetInfo *getHexagonTargetInfo(); 183 TargetInfo *getMSP430TargetInfo(); 184 TargetInfo *getPPC64TargetInfo(); 185 TargetInfo *getPPCTargetInfo(); 186 TargetInfo *getRISCVTargetInfo(); 187 TargetInfo *getSPARCV9TargetInfo(); 188 TargetInfo *getX86TargetInfo(); 189 TargetInfo *getX86_64TargetInfo(); 190 template <class ELFT> TargetInfo *getMipsTargetInfo(); 191 192 struct ErrorPlace { 193 InputSectionBase *isec; 194 std::string loc; 195 std::string srcLoc; 196 }; 197 198 // Returns input section and corresponding source string for the given location. 199 ErrorPlace getErrorPlace(const uint8_t *loc); 200 201 static inline std::string getErrorLocation(const uint8_t *loc) { 202 return getErrorPlace(loc).loc; 203 } 204 205 void writePPC32GlinkSection(uint8_t *buf, size_t numEntries); 206 207 bool tryRelaxPPC64TocIndirection(const Relocation &rel, uint8_t *bufLoc); 208 unsigned getPPCDFormOp(unsigned secondaryOp); 209 210 // In the PowerPC64 Elf V2 abi a function can have 2 entry points. The first 211 // is a global entry point (GEP) which typically is used to initialize the TOC 212 // pointer in general purpose register 2. The second is a local entry 213 // point (LEP) which bypasses the TOC pointer initialization code. The 214 // offset between GEP and LEP is encoded in a function's st_other flags. 215 // This function will return the offset (in bytes) from the global entry-point 216 // to the local entry-point. 217 unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t stOther); 218 219 // Write a prefixed instruction, which is a 4-byte prefix followed by a 4-byte 220 // instruction (regardless of endianness). Therefore, the prefix is always in 221 // lower memory than the instruction. 222 void writePrefixedInstruction(uint8_t *loc, uint64_t insn); 223 224 void addPPC64SaveRestore(); 225 uint64_t getPPC64TocBase(); 226 uint64_t getAArch64Page(uint64_t expr); 227 void riscvFinalizeRelax(int passes); 228 229 class AArch64Relaxer { 230 bool safeToRelaxAdrpLdr = true; 231 232 public: 233 explicit AArch64Relaxer(ArrayRef<Relocation> relocs); 234 235 bool tryRelaxAdrpAdd(const Relocation &adrpRel, const Relocation &addRel, 236 uint64_t secAddr, uint8_t *buf) const; 237 bool tryRelaxAdrpLdr(const Relocation &adrpRel, const Relocation &ldrRel, 238 uint64_t secAddr, uint8_t *buf) const; 239 }; 240 241 extern const TargetInfo *target; 242 TargetInfo *getTarget(); 243 244 template <class ELFT> bool isMipsPIC(const Defined *sym); 245 246 void reportRangeError(uint8_t *loc, const Relocation &rel, const Twine &v, 247 int64_t min, uint64_t max); 248 void reportRangeError(uint8_t *loc, int64_t v, int n, const Symbol &sym, 249 const Twine &msg); 250 251 // Make sure that V can be represented as an N bit signed integer. 252 inline void checkInt(uint8_t *loc, int64_t v, int n, const Relocation &rel) { 253 if (v != llvm::SignExtend64(v, n)) 254 reportRangeError(loc, rel, Twine(v), llvm::minIntN(n), llvm::maxIntN(n)); 255 } 256 257 // Make sure that V can be represented as an N bit unsigned integer. 258 inline void checkUInt(uint8_t *loc, uint64_t v, int n, const Relocation &rel) { 259 if ((v >> n) != 0) 260 reportRangeError(loc, rel, Twine(v), 0, llvm::maxUIntN(n)); 261 } 262 263 // Make sure that V can be represented as an N bit signed or unsigned integer. 264 inline void checkIntUInt(uint8_t *loc, uint64_t v, int n, 265 const Relocation &rel) { 266 // For the error message we should cast V to a signed integer so that error 267 // messages show a small negative value rather than an extremely large one 268 if (v != (uint64_t)llvm::SignExtend64(v, n) && (v >> n) != 0) 269 reportRangeError(loc, rel, Twine((int64_t)v), llvm::minIntN(n), 270 llvm::maxUIntN(n)); 271 } 272 273 inline void checkAlignment(uint8_t *loc, uint64_t v, int n, 274 const Relocation &rel) { 275 if ((v & (n - 1)) != 0) 276 error(getErrorLocation(loc) + "improper alignment for relocation " + 277 lld::toString(rel.type) + ": 0x" + llvm::utohexstr(v) + 278 " is not aligned to " + Twine(n) + " bytes"); 279 } 280 281 // Endianness-aware read/write. 282 inline uint16_t read16(const void *p) { 283 return llvm::support::endian::read16(p, config->endianness); 284 } 285 286 inline uint32_t read32(const void *p) { 287 return llvm::support::endian::read32(p, config->endianness); 288 } 289 290 inline uint64_t read64(const void *p) { 291 return llvm::support::endian::read64(p, config->endianness); 292 } 293 294 inline void write16(void *p, uint16_t v) { 295 llvm::support::endian::write16(p, v, config->endianness); 296 } 297 298 inline void write32(void *p, uint32_t v) { 299 llvm::support::endian::write32(p, v, config->endianness); 300 } 301 302 inline void write64(void *p, uint64_t v) { 303 llvm::support::endian::write64(p, v, config->endianness); 304 } 305 } // namespace elf 306 } // namespace lld 307 308 #ifdef __clang__ 309 #pragma clang diagnostic ignored "-Wgnu-zero-variadic-macro-arguments" 310 #endif 311 #define invokeELFT(f, ...) \ 312 switch (config->ekind) { \ 313 case ELF32LEKind: \ 314 f<ELF32LE>(__VA_ARGS__); \ 315 break; \ 316 case ELF32BEKind: \ 317 f<ELF32BE>(__VA_ARGS__); \ 318 break; \ 319 case ELF64LEKind: \ 320 f<ELF64LE>(__VA_ARGS__); \ 321 break; \ 322 case ELF64BEKind: \ 323 f<ELF64BE>(__VA_ARGS__); \ 324 break; \ 325 default: \ 326 llvm_unreachable("unknown config->ekind"); \ 327 } 328 329 #endif 330