1 /*
2 * Single-precision SVE sinh(x) function.
3 *
4 * Copyright (c) 2023-2024, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6 */
7
8 #include "sv_math.h"
9 #include "test_sig.h"
10 #include "test_defs.h"
11 #include "sv_expm1f_inline.h"
12
13 static const struct data
14 {
15 struct sv_expm1f_data expm1f_consts;
16 uint32_t halff, large_bound;
17 } data = {
18 .expm1f_consts = SV_EXPM1F_DATA,
19 .halff = 0x3f000000,
20 /* 0x1.61814ep+6, above which expm1f helper overflows. */
21 .large_bound = 0x42b0c0a7,
22 };
23
24 static svfloat32_t NOINLINE
special_case(svfloat32_t x,svfloat32_t y,svbool_t pg)25 special_case (svfloat32_t x, svfloat32_t y, svbool_t pg)
26 {
27 return sv_call_f32 (sinhf, x, y, pg);
28 }
29
30 /* Approximation for SVE single-precision sinh(x) using expm1.
31 sinh(x) = (exp(x) - exp(-x)) / 2.
32 The maximum error is 2.26 ULP:
33 _ZGVsMxv_sinhf (0x1.e34a9ep-4) got 0x1.e469ep-4
34 want 0x1.e469e4p-4. */
SV_NAME_F1(sinh)35 svfloat32_t SV_NAME_F1 (sinh) (svfloat32_t x, const svbool_t pg)
36 {
37 const struct data *d = ptr_barrier (&data);
38 svfloat32_t ax = svabs_x (pg, x);
39 svuint32_t sign
40 = sveor_x (pg, svreinterpret_u32 (x), svreinterpret_u32 (ax));
41 svfloat32_t halfsign = svreinterpret_f32 (svorr_x (pg, sign, d->halff));
42
43 svbool_t special = svcmpge (pg, svreinterpret_u32 (ax), d->large_bound);
44
45 /* Up to the point that expm1f overflows, we can use it to calculate sinhf
46 using a slight rearrangement of the definition of asinh. This allows us to
47 retain acceptable accuracy for very small inputs. */
48 svfloat32_t t = expm1f_inline (ax, pg, &d->expm1f_consts);
49 t = svadd_x (pg, t, svdiv_x (pg, t, svadd_x (pg, t, 1.0)));
50
51 /* Fall back to the scalar variant for any lanes which would cause
52 expm1f to overflow. */
53 if (unlikely (svptest_any (pg, special)))
54 return special_case (x, svmul_x (pg, t, halfsign), special);
55
56 return svmul_x (svptrue_b32 (), t, halfsign);
57 }
58
59 TEST_SIG (SV, F, 1, sinh, -10.0, 10.0)
60 TEST_ULP (SV_NAME_F1 (sinh), 1.76)
61 TEST_DISABLE_FENV (SV_NAME_F1 (sinh))
62 TEST_SYM_INTERVAL (SV_NAME_F1 (sinh), 0, 0x1.6a09e8p-32, 1000)
63 TEST_SYM_INTERVAL (SV_NAME_F1 (sinh), 0x1.6a09e8p-32, 0x42b0c0a7, 100000)
64 TEST_SYM_INTERVAL (SV_NAME_F1 (sinh), 0x42b0c0a7, inf, 1000)
65 CLOSE_SVE_ATTR
66