xref: /freebsd/contrib/arm-optimized-routines/math/aarch64/sve/log2.c (revision f3087bef11543b42e0d69b708f367097a4118d24)
1 /*
2  * Double-precision SVE log2 function.
3  *
4  * Copyright (c) 2022-2024, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "sv_math.h"
9 #include "test_sig.h"
10 #include "test_defs.h"
11 
12 #define N (1 << V_LOG2_TABLE_BITS)
13 #define Max (0x7ff0000000000000)
14 #define Min (0x0010000000000000)
15 #define Thresh (0x7fe0000000000000) /* Max - Min.  */
16 
17 static const struct data
18 {
19   double c0, c2;
20   double c1, c3;
21   double invln2, c4;
22   uint64_t off;
23 } data = {
24   .c0 = -0x1.71547652b83p-1,
25   .c1 = 0x1.ec709dc340953p-2,
26   .c2 = -0x1.71547651c8f35p-2,
27   .c3 = 0x1.2777ebe12dda5p-2,
28   .c4 = -0x1.ec738d616fe26p-3,
29   .invln2 = 0x1.71547652b82fep0,
30   .off = 0x3fe6900900000000,
31 };
32 
33 static svfloat64_t NOINLINE
special_case(svfloat64_t w,svuint64_t tmp,svfloat64_t y,svfloat64_t r2,svbool_t special,const struct data * d)34 special_case (svfloat64_t w, svuint64_t tmp, svfloat64_t y, svfloat64_t r2,
35 	      svbool_t special, const struct data *d)
36 {
37   svfloat64_t x = svreinterpret_f64 (svadd_x (svptrue_b64 (), tmp, d->off));
38   return sv_call_f64 (log2, x, svmla_x (svptrue_b64 (), w, r2, y), special);
39 }
40 
41 /* Double-precision SVE log2 routine.
42    Implements the same algorithm as AdvSIMD log10, with coefficients and table
43    entries scaled in extended precision.
44    The maximum observed error is 2.58 ULP:
45    SV_NAME_D1 (log2)(0x1.0b556b093869bp+0) got 0x1.fffb34198d9dap-5
46 					  want 0x1.fffb34198d9ddp-5.  */
SV_NAME_D1(log2)47 svfloat64_t SV_NAME_D1 (log2) (svfloat64_t x, const svbool_t pg)
48 {
49   const struct data *d = ptr_barrier (&data);
50 
51   svuint64_t ix = svreinterpret_u64 (x);
52   svbool_t special = svcmpge (pg, svsub_x (pg, ix, Min), Thresh);
53 
54   /* x = 2^k z; where z is in range [Off,2*Off) and exact.
55      The range is split into N subintervals.
56      The ith subinterval contains z and c is near its center.  */
57   svuint64_t tmp = svsub_x (pg, ix, d->off);
58   svuint64_t i = svlsr_x (pg, tmp, 51 - V_LOG2_TABLE_BITS);
59   i = svand_x (pg, i, (N - 1) << 1);
60   svfloat64_t k = svcvt_f64_x (pg, svasr_x (pg, svreinterpret_s64 (tmp), 52));
61   svfloat64_t z = svreinterpret_f64 (
62       svsub_x (pg, ix, svand_x (pg, tmp, 0xfffULL << 52)));
63 
64   svfloat64_t invc = svld1_gather_index (pg, &__v_log2_data.table[0].invc, i);
65   svfloat64_t log2c
66       = svld1_gather_index (pg, &__v_log2_data.table[0].log2c, i);
67 
68   /* log2(x) = log1p(z/c-1)/log(2) + log2(c) + k.  */
69 
70   svfloat64_t invln2_and_c4 = svld1rq_f64 (svptrue_b64 (), &d->invln2);
71   svfloat64_t r = svmad_x (pg, invc, z, -1.0);
72   svfloat64_t w = svmla_lane_f64 (log2c, r, invln2_and_c4, 0);
73   w = svadd_x (pg, k, w);
74 
75   svfloat64_t odd_coeffs = svld1rq_f64 (svptrue_b64 (), &d->c1);
76   svfloat64_t r2 = svmul_x (svptrue_b64 (), r, r);
77   svfloat64_t y = svmla_lane_f64 (sv_f64 (d->c2), r, odd_coeffs, 1);
78   svfloat64_t p = svmla_lane_f64 (sv_f64 (d->c0), r, odd_coeffs, 0);
79   y = svmla_lane_f64 (y, r2, invln2_and_c4, 1);
80   y = svmla_x (pg, p, r2, y);
81 
82   if (unlikely (svptest_any (pg, special)))
83     return special_case (w, tmp, y, r2, special, d);
84   return svmla_x (pg, w, r2, y);
85 }
86 
87 TEST_SIG (SV, D, 1, log2, 0.01, 11.1)
88 TEST_ULP (SV_NAME_D1 (log2), 2.09)
89 TEST_DISABLE_FENV (SV_NAME_D1 (log2))
90 TEST_INTERVAL (SV_NAME_D1 (log2), -0.0, -0x1p126, 1000)
91 TEST_INTERVAL (SV_NAME_D1 (log2), 0.0, 0x1p-126, 4000)
92 TEST_INTERVAL (SV_NAME_D1 (log2), 0x1p-126, 0x1p-23, 50000)
93 TEST_INTERVAL (SV_NAME_D1 (log2), 0x1p-23, 1.0, 50000)
94 TEST_INTERVAL (SV_NAME_D1 (log2), 1.0, 100, 50000)
95 TEST_INTERVAL (SV_NAME_D1 (log2), 100, inf, 50000)
96 CLOSE_SVE_ATTR
97