xref: /freebsd/contrib/arm-optimized-routines/math/aarch64/sve/atanh.c (revision f3087bef11543b42e0d69b708f367097a4118d24)
1 /*
2  * Double-precision SVE atanh(x) function.
3  *
4  * Copyright (c) 2023-2024, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "sv_math.h"
9 #include "test_sig.h"
10 #include "test_defs.h"
11 
12 #define WANT_SV_LOG1P_K0_SHORTCUT 0
13 #include "sv_log1p_inline.h"
14 
15 #define One (0x3ff0000000000000)
16 #define Half (0x3fe0000000000000)
17 
18 static svfloat64_t NOINLINE
special_case(svfloat64_t x,svfloat64_t y,svbool_t special)19 special_case (svfloat64_t x, svfloat64_t y, svbool_t special)
20 {
21   return sv_call_f64 (atanh, x, y, special);
22 }
23 
24 /* SVE approximation for double-precision atanh, based on log1p.
25    The greatest observed error is 2.81 ULP:
26    _ZGVsMxv_atanh(0x1.ffae6288b601p-6) got 0x1.ffd8ff31b5019p-6
27 				      want 0x1.ffd8ff31b501cp-6.  */
SV_NAME_D1(atanh)28 svfloat64_t SV_NAME_D1 (atanh) (svfloat64_t x, const svbool_t pg)
29 {
30 
31   svfloat64_t ax = svabs_x (pg, x);
32   svuint64_t iax = svreinterpret_u64 (ax);
33   svuint64_t sign = sveor_x (pg, svreinterpret_u64 (x), iax);
34   svfloat64_t halfsign = svreinterpret_f64 (svorr_x (pg, sign, Half));
35 
36   /* It is special if iax >= 1.  */
37   svbool_t special = svacge (pg, x, 1.0);
38 
39   /* Computation is performed based on the following sequence of equality:
40 	(1+x)/(1-x) = 1 + 2x/(1-x).  */
41   svfloat64_t y;
42   y = svadd_x (pg, ax, ax);
43   y = svdiv_x (pg, y, svsub_x (pg, sv_f64 (1), ax));
44   /* ln((1+x)/(1-x)) = ln(1+2x/(1-x)) = ln(1 + y).  */
45   y = sv_log1p_inline (y, pg);
46 
47   if (unlikely (svptest_any (pg, special)))
48     return special_case (x, svmul_x (pg, halfsign, y), special);
49   return svmul_x (pg, halfsign, y);
50 }
51 
52 TEST_SIG (SV, D, 1, atanh, -1.0, 1.0)
53 TEST_ULP (SV_NAME_D1 (atanh), 3.32)
54 TEST_DISABLE_FENV (SV_NAME_D1 (atanh))
55 TEST_SYM_INTERVAL (SV_NAME_D1 (atanh), 0, 0x1p-23, 10000)
56 TEST_SYM_INTERVAL (SV_NAME_D1 (atanh), 0x1p-23, 1, 90000)
57 TEST_SYM_INTERVAL (SV_NAME_D1 (atanh), 1, inf, 100)
58 /* atanh is asymptotic at 1, which is the default control value - have to set
59    -c 0 specially to ensure fp exceptions are triggered correctly (choice of
60    control lane is irrelevant if fp exceptions are disabled).  */
61 TEST_CONTROL_VALUE (SV_NAME_D1 (atanh), 0)
62 CLOSE_SVE_ATTR
63