1 /*
2 * Double-precision vector sinpi function.
3 *
4 * Copyright (c) 2023-2024, Arm Limited.
5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6 */
7
8 #include "mathlib.h"
9 #include "v_math.h"
10 #include "v_poly_f64.h"
11 #include "test_sig.h"
12 #include "test_defs.h"
13
14 static const struct data
15 {
16 float64x2_t poly[10];
17 } data = {
18 /* Polynomial coefficients generated using Remez algorithm,
19 see sinpi.sollya for details. */
20 .poly = { V2 (0x1.921fb54442d184p1), V2 (-0x1.4abbce625be53p2),
21 V2 (0x1.466bc6775ab16p1), V2 (-0x1.32d2cce62dc33p-1),
22 V2 (0x1.507834891188ep-4), V2 (-0x1.e30750a28c88ep-8),
23 V2 (0x1.e8f48308acda4p-12), V2 (-0x1.6fc0032b3c29fp-16),
24 V2 (0x1.af86ae521260bp-21), V2 (-0x1.012a9870eeb7dp-25) },
25 };
26
27 #if WANT_SIMD_EXCEPT
28 # define TinyBound v_u64 (0x3bf0000000000000) /* asuint64(0x1p-64). */
29 /* asuint64(0x1p64) - TinyBound. */
30 # define Thresh v_u64 (0x07f0000000000000)
31
32 static float64x2_t VPCS_ATTR NOINLINE
special_case(float64x2_t x,float64x2_t y,uint64x2_t odd,uint64x2_t cmp)33 special_case (float64x2_t x, float64x2_t y, uint64x2_t odd, uint64x2_t cmp)
34 {
35 /* Fall back to scalar code. */
36 y = vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd));
37 return v_call_f64 (arm_math_sinpi, x, y, cmp);
38 }
39 #endif
40
41 /* Approximation for vector double-precision sinpi(x).
42 Maximum Error 3.05 ULP:
43 _ZGVnN2v_sinpi(0x1.d32750db30b4ap-2) got 0x1.fb295878301c7p-1
44 want 0x1.fb295878301cap-1. */
V_NAME_D1(sinpi)45 float64x2_t VPCS_ATTR V_NAME_D1 (sinpi) (float64x2_t x)
46 {
47 const struct data *d = ptr_barrier (&data);
48
49 #if WANT_SIMD_EXCEPT
50 uint64x2_t ir = vreinterpretq_u64_f64 (vabsq_f64 (x));
51 uint64x2_t cmp = vcgeq_u64 (vsubq_u64 (ir, TinyBound), Thresh);
52
53 /* When WANT_SIMD_EXCEPT = 1, special lanes should be set to 0
54 to avoid them under/overflowing and throwing exceptions. */
55 float64x2_t r = v_zerofy_f64 (x, cmp);
56 #else
57 float64x2_t r = x;
58 #endif
59
60 /* If r is odd, the sign of the result should be inverted. */
61 uint64x2_t odd
62 = vshlq_n_u64 (vreinterpretq_u64_s64 (vcvtaq_s64_f64 (r)), 63);
63
64 /* r = x - rint(x). Range reduction to -1/2 .. 1/2. */
65 r = vsubq_f64 (r, vrndaq_f64 (r));
66
67 /* y = sin(r). */
68 float64x2_t r2 = vmulq_f64 (r, r);
69 float64x2_t r4 = vmulq_f64 (r2, r2);
70 float64x2_t y = vmulq_f64 (v_pw_horner_9_f64 (r2, r4, d->poly), r);
71
72 #if WANT_SIMD_EXCEPT
73 if (unlikely (v_any_u64 (cmp)))
74 return special_case (x, y, odd, cmp);
75 #endif
76
77 return vreinterpretq_f64_u64 (veorq_u64 (vreinterpretq_u64_f64 (y), odd));
78 }
79
80 #if WANT_TRIGPI_TESTS
81 TEST_ULP (V_NAME_D1 (sinpi), 2.56)
82 TEST_DISABLE_FENV_IF_NOT (V_NAME_D1 (sinpi), WANT_SIMD_EXCEPT)
83 TEST_SYM_INTERVAL (V_NAME_D1 (sinpi), 0, 0x1p-63, 5000)
84 TEST_SYM_INTERVAL (V_NAME_D1 (sinpi), 0x1p-63, 0.5, 10000)
85 TEST_SYM_INTERVAL (V_NAME_D1 (sinpi), 0.5, 0x1p51, 10000)
86 TEST_SYM_INTERVAL (V_NAME_D1 (sinpi), 0x1p51, inf, 10000)
87 #endif
88