xref: /freebsd/contrib/arm-optimized-routines/math/aarch64/advsimd/log1p.c (revision f3087bef11543b42e0d69b708f367097a4118d24)
1 /*
2  * Double-precision vector log(1+x) function.
3  *
4  * Copyright (c) 2022-2024, Arm Limited.
5  * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception
6  */
7 
8 #include "v_math.h"
9 #include "test_sig.h"
10 #include "test_defs.h"
11 
12 #define WANT_V_LOG1P_K0_SHORTCUT 0
13 #include "v_log1p_inline.h"
14 
15 const static struct data
16 {
17   struct v_log1p_data d;
18   uint64x2_t inf, minus_one;
19 } data = { .d = V_LOG1P_CONSTANTS_TABLE,
20 	   .inf = V2 (0x7ff0000000000000),
21 	   .minus_one = V2 (0xbff0000000000000) };
22 
23 #define BottomMask v_u64 (0xffffffff)
24 
25 static float64x2_t NOINLINE VPCS_ATTR
special_case(float64x2_t x,uint64x2_t cmp,const struct data * d)26 special_case (float64x2_t x, uint64x2_t cmp, const struct data *d)
27 {
28   /* Side-step special lanes so fenv exceptions are not triggered
29      inadvertently.  */
30   float64x2_t x_nospecial = v_zerofy_f64 (x, cmp);
31   return v_call_f64 (log1p, x, log1p_inline (x_nospecial, &d->d), cmp);
32 }
33 
34 /* Vector log1p approximation using polynomial on reduced interval. Routine is
35    a modification of the algorithm used in scalar log1p, with no shortcut for
36    k=0 and no narrowing for f and k. Maximum observed error is 2.45 ULP:
37    _ZGVnN2v_log1p(0x1.658f7035c4014p+11) got 0x1.fd61d0727429dp+2
38 					want 0x1.fd61d0727429fp+2 .  */
V_NAME_D1(log1p)39 VPCS_ATTR float64x2_t V_NAME_D1 (log1p) (float64x2_t x)
40 {
41   const struct data *d = ptr_barrier (&data);
42   uint64x2_t ix = vreinterpretq_u64_f64 (x);
43   uint64x2_t ia = vreinterpretq_u64_f64 (vabsq_f64 (x));
44 
45   uint64x2_t special_cases
46       = vorrq_u64 (vcgeq_u64 (ia, d->inf), vcgeq_u64 (ix, d->minus_one));
47 
48   if (unlikely (v_any_u64 (special_cases)))
49     return special_case (x, special_cases, d);
50 
51   return log1p_inline (x, &d->d);
52 }
53 
54 TEST_SIG (V, D, 1, log1p, -0.9, 10.0)
55 TEST_ULP (V_NAME_D1 (log1p), 1.95)
56 TEST_DISABLE_FENV_IF_NOT (V_NAME_D1 (log1p), WANT_SIMD_EXCEPT)
57 TEST_SYM_INTERVAL (V_NAME_D1 (log1p), 0.0, 0x1p-23, 50000)
58 TEST_SYM_INTERVAL (V_NAME_D1 (log1p), 0x1p-23, 0.001, 50000)
59 TEST_SYM_INTERVAL (V_NAME_D1 (log1p), 0.001, 1.0, 50000)
60 TEST_INTERVAL (V_NAME_D1 (log1p), 1, inf, 40000)
61 TEST_INTERVAL (V_NAME_D1 (log1p), -1.0, -inf, 500)
62