Searched refs:uvd (Results 1 – 10 of 10) sorted by relevance
46 if (rdev->uvd.fw_header_present) in uvd_v4_2_resume()47 addr = (rdev->uvd.gpu_addr + 0x200) >> 3; in uvd_v4_2_resume()49 addr = rdev->uvd.gpu_addr >> 3; in uvd_v4_2_resume()62 (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3; in uvd_v4_2_resume()67 addr = (rdev->uvd.gpu_addr >> 28) & 0xF; in uvd_v4_2_resume()71 addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; in uvd_v4_2_resume()74 if (rdev->uvd.fw_header_present) in uvd_v4_2_resume()75 WREG32(UVD_GP_SCRATCH4, rdev->uvd.max_handles); in uvd_v4_2_resume()
113 addr = rdev->uvd.gpu_addr >> 3; in uvd_v2_2_resume()125 (RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles)) >> 3; in uvd_v2_2_resume()130 addr = (rdev->uvd.gpu_addr >> 28) & 0xF; in uvd_v2_2_resume()134 addr = (rdev->uvd.gpu_addr >> 32) & 0xFF; in uvd_v2_2_resume()
776 rdev->fence_drv[ring].cpu_addr = rdev->uvd.cpu_addr + index; in radeon_fence_driver_start_ring()777 rdev->fence_drv[ring].gpu_addr = rdev->uvd.gpu_addr + index; in radeon_fence_driver_start_ring()
203 adev->uvd.inst->ring.funcs = &uvd_v3_1_ring_funcs; in uvd_v3_1_set_ring_funcs()250 addr = (adev->uvd.inst->gpu_addr + AMDGPU_UVD_FIRMWARE_OFFSET) >> 3; in uvd_v3_1_mc_resume()262 (AMDGPU_UVD_SESSION_SIZE * adev->uvd.max_handles)) >> 3; in uvd_v3_1_mc_resume()267 addr = (adev->uvd.inst->gpu_addr >> 28) & 0xF; in uvd_v3_1_mc_resume()271 addr = (adev->uvd.inst->gpu_addr >> 32) & 0xFF; in uvd_v3_1_mc_resume()289 uint32_t keysel = adev->uvd.keyselect; in uvd_v3_1_fw_validate()293 RREG32(mmUVD_FW_START), adev->uvd.keyselect); in uvd_v3_1_fw_validate()332 struct amdgpu_ring *ring = &adev->uvd.inst->ring; in uvd_v3_1_start()527 amdgpu_fence_process(&adev->uvd.inst->ring); in uvd_v3_1_process_interrupt()539 adev->uvd.inst->irq.num_types = 1; in uvd_v3_1_set_irq_funcs()[all …]
225 fw_info->ver = adev->uvd.fw_version; in amdgpu_firmware_info()495 for (i = 0; i < adev->uvd.num_uvd_inst; i++) { in amdgpu_hw_ip_info()496 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_hw_ip_info()499 if (adev->uvd.inst[i].ring.sched.ready && in amdgpu_hw_ip_info()500 !adev->uvd.inst[i].ring.no_user_submission) in amdgpu_hw_ip_info()517 for (i = 0; i < adev->uvd.num_uvd_inst; i++) { in amdgpu_hw_ip_info()518 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_hw_ip_info()521 for (j = 0; j < adev->uvd.num_enc_rings; j++) in amdgpu_hw_ip_info()522 if (adev->uvd.inst[i].ring_enc[j].sched.ready && in amdgpu_hw_ip_info()523 !adev->uvd.inst[i].ring_enc[j].no_user_submission) in amdgpu_hw_ip_info()[all …]
37 …(AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(((const struct common_firmware_header *)(adev)->uvd.fw->data)->…
92 adev->uvd.fw_version); in amdgpu_devcoredump_fw_info()
112 uint32_t uvd : 1; member
135 uint32_t uvd : 1; member
2013 adev->uvd.decode_image_width >= WIDTH_4K) in smu8_dpm_powergate_uvd()