Searched refs:uart0_parents (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 75 static const char * const uart0_parents[] __initconst = { variable
365 MUX(CLK_TOP_UART0_SEL, "uart0_sel", uart0_parents,
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| H A D | clk-mt8167.c | 88 static const char * const uart0_parents[] = { variable
524 MUX(CLK_TOP_UART0_SEL, "uart0_sel", uart0_parents,
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| /linux/drivers/clk/spear/ |
| H A D | spear3xx_clock.c | 128 static const char *uart0_parents[] = { "pll3_clk", "uart_syn_gclk", }; variable
440 clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents, in spear3xx_clk_init()
441 ARRAY_SIZE(uart0_parents), in spear3xx_clk_init()
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| H A D | spear1310_clock.c | 357 static const char *uart0_parents[] = { "pll5_clk", "uart_syn_gclk", }; variable
556 clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents, in spear1310_clk_init()
557 ARRAY_SIZE(uart0_parents), in spear1310_clk_init()
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