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Searched refs:tbl_size (Results 1 – 15 of 15) sorted by relevance

/linux/arch/powerpc/boot/
H A Dsimple_alloc.c130 unsigned long heap_base, tbl_size; in simple_alloc_init() local
136 tbl_size = tbl_entries * sizeof(struct alloc_info); in simple_alloc_init()
139 memset(alloc_tbl, 0, tbl_size); in simple_alloc_init()
141 heap_base = _ALIGN_UP((unsigned long)alloc_tbl + tbl_size, alloc_min); in simple_alloc_init()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_bios.c603 acpi_size tbl_size; in radeon_acpi_vfct_bios() local
610 tbl_size = hdr->length; in radeon_acpi_vfct_bios()
611 if (tbl_size < sizeof(UEFI_ACPI_VFCT)) { in radeon_acpi_vfct_bios()
619 while (offset < tbl_size) { in radeon_acpi_vfct_bios()
624 if (offset > tbl_size) { in radeon_acpi_vfct_bios()
630 if (offset > tbl_size) { in radeon_acpi_vfct_bios()
/linux/fs/exfat/
H A Dnls.c743 unsigned long long tbl_size, num_sectors; in exfat_create_upcase_table() local
771 tbl_size = le64_to_cpu(ep->dentry.upcase.size); in exfat_create_upcase_table()
774 num_sectors = ((tbl_size - 1) >> blksize_bits) + 1; in exfat_create_upcase_table()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ras_eeprom.c148 #define RAS_NUM_RECS(_tbl_hdr) (((_tbl_hdr)->tbl_size - \
151 #define RAS_NUM_RECS_V2_1(_tbl_hdr) (((_tbl_hdr)->tbl_size - \
248 pp[3] = cpu_to_le32(hdr->tbl_size); in __encode_table_header_to_buf()
261 hdr->tbl_size = le32_to_cpu(pp[3]); in __decode_table_header_from_buf()
461 hdr->tbl_size = RAS_TABLE_HEADER_SIZE + in amdgpu_ras_eeprom_reset_table()
476 hdr->tbl_size = RAS_TABLE_HEADER_SIZE; in amdgpu_ras_eeprom_reset_table()
814 control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE + in amdgpu_ras_eeprom_update_header()
818 control->tbl_hdr.tbl_size = RAS_TABLE_HEADER_SIZE + in amdgpu_ras_eeprom_update_header()
827 control->tbl_hdr.tbl_size); in amdgpu_ras_eeprom_update_header()
1314 control->tbl_hdr.tbl_size, in amdgpu_ras_debugfs_table_read()
H A Damdgpu_ras_eeprom.h51 uint32_t tbl_size; member
/linux/drivers/acpi/pmic/
H A Dtps68470_pmic.c280 unsigned int tbl_size) in tps68470_pmic_common_handler() argument
289 ret = pmic_get_reg_bit(address, tbl, tbl_size, &reg, &bitmask); in tps68470_pmic_common_handler()
/linux/drivers/regulator/
H A Dmt6360-regulator.c383 int tbl_size) in mt6360_regulator_irq_register() argument
387 for (i = 0; i < tbl_size; i++) { in mt6360_regulator_irq_register()
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ddp.c148 sec->tbl_size = 1; in i40e_add_pinfo()
188 sec->tbl_size = 1; in i40e_del_pinfo()
H A Di40e_type.h1351 u16 tbl_size; member
/linux/drivers/net/ethernet/amazon/ena/
H A Dena_com.c1112 size_t tbl_size; in ena_com_indirect_table_allocate() local
1129 tbl_size = (1ULL << log_size) * in ena_com_indirect_table_allocate()
1132 rss->rss_ind_tbl = dma_alloc_coherent(ena_dev->dmadev, tbl_size, &rss->rss_ind_tbl_dma_addr, in ena_com_indirect_table_allocate()
1137 tbl_size = (1ULL << log_size) * sizeof(u16); in ena_com_indirect_table_allocate()
1138 rss->host_rss_ind_tbl = devm_kzalloc(ena_dev->dmadev, tbl_size, GFP_KERNEL); in ena_com_indirect_table_allocate()
1147 tbl_size = (1ULL << log_size) * in ena_com_indirect_table_allocate()
1150 dma_free_coherent(ena_dev->dmadev, tbl_size, rss->rss_ind_tbl, rss->rss_ind_tbl_dma_addr); in ena_com_indirect_table_allocate()
1160 size_t tbl_size = (1ULL << rss->tbl_log_size) * in ena_com_indirect_table_destroy() local
1164 dma_free_coherent(ena_dev->dmadev, tbl_size, rss->rss_ind_tbl, in ena_com_indirect_table_destroy()
2918 u32 tbl_size; in ena_com_indirect_table_get() local
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/linux/kernel/dma/
H A Dswiotlb.c528 size_t tbl_size, slots_size; in swiotlb_exit() local
539 tbl_size = PAGE_ALIGN(mem->end - mem->start); in swiotlb_exit()
542 set_memory_encrypted(tbl_vaddr, tbl_size >> PAGE_SHIFT); in swiotlb_exit()
547 free_pages(tbl_vaddr, get_order(tbl_size)); in swiotlb_exit()
552 memblock_phys_free(mem->start, tbl_size); in swiotlb_exit()
/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt_ethtool.c1070 int tbl_size, u32 *ids, u32 start, in bnxt_get_all_fltr_ids_rcu() argument
1077 for (i = 0; i < tbl_size; i++) { in bnxt_get_all_fltr_ids_rcu()
1096 int tbl_size, u32 id) in bnxt_get_one_fltr_rcu() argument
1100 for (i = 0; i < tbl_size; i++) { in bnxt_get_one_fltr_rcu()
1885 u32 i, tbl_size; in bnxt_get_rxfh() local
1905 tbl_size = bnxt_get_rxfh_indir_size(dev); in bnxt_get_rxfh()
1906 for (i = 0; i < tbl_size; i++) in bnxt_get_rxfh()
1930 u32 i, pad, tbl_size = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_modify_rss() local
1935 for (i = 0; i < tbl_size; i++) in bnxt_modify_rss()
1937 pad = bp->rss_indir_tbl_entries - tbl_size; in bnxt_modify_rss()
H A Dbnxt.c6671 u32 i, tbl_size, max_ring = 0; in bnxt_get_max_rss_ring() local
6676 tbl_size = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_get_max_rss_ring()
6677 for (i = 0; i < tbl_size; i++) in bnxt_get_max_rss_ring()
6716 u16 tbl_size, i; in bnxt_fill_hw_rss_tbl_p5() local
6718 tbl_size = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_fill_hw_rss_tbl_p5()
6720 for (i = 0; i < tbl_size; i++) { in bnxt_fill_hw_rss_tbl_p5()
11011 u16 tbl_size = bnxt_get_rxfh_indir_size(bp->dev); in bnxt_vnic_has_rx_ring() local
11020 for (i = 0; i < tbl_size; i++) { in bnxt_vnic_has_rx_ring()
11527 int i, total_vecs, max, rc = 0, min = 1, ulp_msix, tx_cp, tbl_size; in bnxt_init_int_mode() local
11548 tbl_size = total_vecs; in bnxt_init_int_mode()
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/linux/drivers/gpu/drm/amd/display/dc/bios/
H A Dbios_parser.c1126 uint32_t tbl_size, i; in get_ss_info_from_internal_ss_info_tbl_V2_1() local
1140 tbl_size = (le16_to_cpu(header->sHeader.usStructureSize) in get_ss_info_from_internal_ss_info_tbl_V2_1()
1146 for (i = 0; i < tbl_size; i++) { in get_ss_info_from_internal_ss_info_tbl_V2_1()
/linux/drivers/infiniband/hw/ionic/
H A Dionic_controlpath.c1102 mr->buf.tbl_size, DMA_TO_DEVICE); in ionic_map_mr_sg()
1111 mr->buf.tbl_size, DMA_TO_DEVICE); in ionic_map_mr_sg()