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Searched refs:sp0 (Results 1 – 5 of 5) sorted by relevance

/linux/arch/x86/include/asm/
H A Dprocessor.h269 unsigned long sp0;
275 * the same cacheline as sp0. We use ss1 to cache the value in
316 u64 sp0;
458 unsigned long sp0;
540 native_load_sp0(unsigned long sp0) in native_load_sp0()
542 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); in native_load_sp0()
555 * We can't read directly from tss.sp0: sp0 on x86_32 is special in in current_top_of_stack()
556 * and around vm86 mode and sp0 o in current_top_of_stack()
268 unsigned long sp0; global() member
315 u64 sp0; global() member
457 unsigned long sp0; global() member
539 native_load_sp0(unsigned long sp0) native_load_sp0() argument
574 load_sp0(unsigned long sp0) load_sp0() argument
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/linux/arch/x86/kvm/
H A Dtss.h37 u16 sp0; member
/linux/arch/x86/xen/
H A Denlighten_pv.c1002 static void xen_load_sp0(unsigned long sp0) in xen_write_gdt_entry_boot()
1007 MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
1009 this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); in xen_load_sp0()
1008 xen_load_sp0(unsigned long sp0) xen_load_sp0() argument
/linux/arch/x86/kernel/
H A Dvm86_32.c145 tsk->thread.sp0 = vm86->saved_sp0; in save_v86_state()
326 vm86->saved_sp0 = tsk->thread.sp0; in do_sys_vm86()
331 tsk->thread.sp0 += 16; in do_sys_vm86()
H A Dtraps.c613 * advantage of the fact that we're not using the normal (TSS.sp0) in DEFINE_IDTENTRY_DF()
614 * stack right now. We can write a fake #GP(0) frame at TSS.sp0 in DEFINE_IDTENTRY_DF()
628 struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; in DEFINE_IDTENTRY_DF()
1107 new_stack = (struct pt_regs *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; in fixup_bad_iret()