Searched refs:rx_reg (Results 1 – 7 of 7) sorted by relevance
37 void __iomem *rx_reg; member53 val = readl_relaxed(mlink->rx_reg + INTR_STAT_OFS); in platform_mhu_rx_interrupt()59 writel_relaxed(val, mlink->rx_reg + INTR_CLR_OFS); in platform_mhu_rx_interrupt()141 mhu->mlink[i].rx_reg = mhu->base + platform_mhu_reg[i]; in platform_mhu_probe()142 mhu->mlink[i].tx_reg = mhu->mlink[i].rx_reg + TX_REG_OFFSET; in platform_mhu_probe()
21 dma_addr_t rx_reg; member
41 u64 rx_reg; member
709 void __iomem *rx_reg; in omap2_mcspi_txrx_pio() local722 rx_reg = base + OMAP2_MCSPI_RX0; in omap2_mcspi_txrx_pio()757 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()771 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()806 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()820 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()855 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()869 *rx++ = readl_relaxed(rx_reg); in omap2_mcspi_txrx_pio()
902 u32 rx_reg; in sky2_mac_init() local986 rx_reg = GMF_OPER_ON | GMF_RX_F_FL_ON; in sky2_mac_init()989 rx_reg |= GMF_RX_OVER_ON; in sky2_mac_init()991 sky2_write32(hw, SK_REG(port, RX_GMF_CTRL_T), rx_reg); in sky2_mac_init()
4787 u32 rx_reg; in i40e_pf_rxq_wait() local4790 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q)); in i40e_pf_rxq_wait()4791 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) in i40e_pf_rxq_wait()4815 u32 rx_reg; in i40e_control_rx_q() local4819 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q)); in i40e_control_rx_q()4820 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) == in i40e_control_rx_q()4821 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1)) in i40e_control_rx_q()4827 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK)) in i40e_control_rx_q()4832 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK; in i40e_control_rx_q()4834 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK; in i40e_control_rx_q()[all …]
702 param->rx_reg = port->mapbase + UART_RX; in pch_request_dma()