| /linux/drivers/net/wireless/realtek/rtw89/ |
| H A D | rtw8852b_common.c | 513 rtw89_phy_write32_mask(rtwdev, R_RXSCOBC, B_RXSCOBC_TH, in rtw8852bx_ctrl_sco_cck() 515 rtw89_phy_write32_mask(rtwdev, R_RXSCOCCK, B_RXSCOCCK_TH, in rtw8852bx_ctrl_sco_cck() 596 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852bx_set_gain_error() 607 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852bx_set_gain_error() 629 rtw89_phy_write32_mask(rtwdev, R_PWOFST, B_PWOFST, pwrofst); in rtw8852bt_ext_loss_avg_update() 654 rtw89_phy_write32_mask(rtwdev, gain_err_addr[path], MASKBYTE0, tmp); in rtw8852bx_set_gain_offset() 668 rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_A], B_PATH0_R_G_OFST_MASK, tmp); in rtw8852bx_set_gain_offset() 672 rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_B], B_PATH0_R_G_OFST_MASK, tmp); in rtw8852bx_set_gain_offset() 693 rtw89_phy_write32_mask(rtwdev, R_RX_RPL_OFST, in rtw8852bx_set_gain_offset() 719 rtw89_phy_write32_mask(rtwdev, R_P0_RPL1, B_P0_RPL1_MASK, val); in rtw8852bx_set_rxsc_rpl_comp() [all …]
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| H A D | rtw8851b_rfk.c | 153 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x0101); in _adc_fifo_rst() 155 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x1111); in _adc_fifo_rst() 179 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x0); in _txck_force() 184 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_VAL, ck); in _txck_force() 185 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_TXCK_ON, 0x1); in _txck_force() 195 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x0); in _rxck_force() 199 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_VAL, ck); in _rxck_force() 200 rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x1); in _rxck_force() 212 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_CTL, data[0]); in _rxck_force() 213 rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_EN, data[1]); in _rxck_force() [all …]
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| H A D | rtw8852b_rfk.c | 212 rtw89_phy_write32_mask(rtwdev, rtw8852b_backup_bb_regs[i], in _rfk_restore_bb_reg() 268 rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, MASKBYTE0, 0x0); in _iqk_check_cal() 318 rtw89_phy_write32_mask(rtwdev, in _rx_dck() 330 rtw89_phy_write32_mask(rtwdev, in _rx_dck() 385 rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_KICK, 0x1); in _drck() 392 rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_KICK, 0x0); in _drck() 393 rtw89_phy_write32_mask(rtwdev, R_DRCK_FH, B_DRCK_LAT, 0x1); in _drck() 395 rtw89_phy_write32_mask(rtwdev, R_DRCK_FH, B_DRCK_LAT, 0x0); in _drck() 397 rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_SEL, 0x0); in _drck() 398 rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_CV, rck_d); in _drck() [all …]
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| H A D | rtw8852c.c | 918 rtw89_phy_write32_mask(rtwdev, R_BK_FC0_INV_V1, B_BK_FC0_INV_MSK_V1, in rtw8852c_ctrl_sco_cck() 920 rtw89_phy_write32_mask(rtwdev, R_CCK_FC0_INV_V1, B_CCK_FC0_INV_MSK_V1, in rtw8852c_ctrl_sco_cck() 1031 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error() 1042 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error() 1048 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error() 1053 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error() 1061 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error() 1072 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8852c_set_gain_error() 1102 rtw89_phy_write32_mask(rtwdev, R_RPL_OFST, B_RPL_OFST_MASK, tmp & 0x7f); in rtw8852c_set_gain_offset() 1112 rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[path], B_PATH0_R_G_OFST_MASK, tmp & 0xff); in rtw8852c_set_gain_offset() [all …]
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| H A D | rtw8851b.c | 871 rtw89_phy_write32_mask(rtwdev, addr, mask, RF_PATH_A); in rtw8851b_set_bb_gpio() 872 rtw89_phy_write32_mask(rtwdev, R_RFE_INV0, BIT(gpio_idx), inv); in rtw8851b_set_bb_gpio() 878 rtw89_phy_write32_mask(rtwdev, addr, mask, src_sel); in rtw8851b_set_bb_gpio() 990 rtw89_phy_write32_mask(rtwdev, R_RXSCOBC, B_RXSCOBC_TH, in rtw8851b_ctrl_sco_cck() 992 rtw89_phy_write32_mask(rtwdev, R_RXSCOCCK, B_RXSCOCCK_TH, in rtw8851b_ctrl_sco_cck() 1073 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8851b_set_gain_error() 1084 rtw89_phy_write32_mask(rtwdev, reg, mask, val); in rtw8851b_set_gain_error() 1107 rtw89_phy_write32_mask(rtwdev, gain_err_addr[path], MASKBYTE0, tmp); in rtw8851b_set_gain_offset() 1120 rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_A], B_PATH0_R_G_OFST_MASK, tmp); in rtw8851b_set_gain_offset() 1136 rtw89_phy_write32_mask(rtwdev, R_RX_RPL_OFST, in rtw8851b_set_gain_offset() [all …]
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| H A D | rtw8852c_rfk.c | 128 rtw89_phy_write32_mask(rtwdev, rtw8852c_backup_bb_regs[i], in _rfk_restore_bb_reg() 222 rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x0); in _addck_backup() 228 rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1, 0x0); in _addck_backup() 239 rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RL1, in _addck_reload() 241 rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RL0, in _addck_reload() 243 rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RLS, 0x3); in _addck_reload() 244 rtw89_phy_write32_mask(rtwdev, R_ADDCK1_RL, B_ADDCK1_RL1, in _addck_reload() 246 rtw89_phy_write32_mask(rtwdev, R_ADDCK1_RL, B_ADDCK1_RL0, in _addck_reload() 248 rtw89_phy_write32_mask(rtwdev, R_ADDCK1_RL, B_ADDCK1_RLS, 0x3); in _addck_reload() 256 rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); in _dack_backup_s0() [all …]
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| H A D | rtw8852a_rfk.c | 69 rtw89_phy_write32_mask(rtwdev, rtw8852a_backup_bb_regs[i], in _rfk_restore_bb_reg() 185 rtw89_phy_write32_mask(rtwdev, R_S0_RXDC, B_S0_RXDC_I, dack->addck_d[0][0]); in _addck_reload() 186 rtw89_phy_write32_mask(rtwdev, R_S0_RXDC2, B_S0_RXDC2_Q2, in _addck_reload() 188 rtw89_phy_write32_mask(rtwdev, R_S0_RXDC, B_S0_RXDC_Q, in _addck_reload() 191 rtw89_phy_write32_mask(rtwdev, R_S1_RXDC, B_S1_RXDC_I, dack->addck_d[1][0]); in _addck_reload() 192 rtw89_phy_write32_mask(rtwdev, R_S1_RXDC2, B_S1_RXDC2_Q2, in _addck_reload() 194 rtw89_phy_write32_mask(rtwdev, R_S1_RXDC, B_S1_RXDC_Q, in _addck_reload() 209 rtw89_phy_write32_mask(rtwdev, R_S0_DACKI, B_S0_DACKI_AR, i); in _dack_backup_s0() 212 rtw89_phy_write32_mask(rtwdev, R_S0_DACKQ, B_S0_DACKQ_AR, i); in _dack_backup_s0() 236 rtw89_phy_write32_mask(rtwdev, R_S1_DACKI, B_S1_DACKI_AR, i); in _dack_backup_s1() [all …]
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| H A D | rtw8852a.c | 948 rtw89_phy_write32_mask(rtwdev, R_RXSCOBC, B_RXSCOBC_TH, in rtw8852a_ctrl_sco_cck() 950 rtw89_phy_write32_mask(rtwdev, R_RXSCOCCK, B_RXSCOCCK_TH, in rtw8852a_ctrl_sco_cck() 1069 rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, in rtw8852a_ctrl_ch() 1071 rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, in rtw8852a_ctrl_ch() 1073 rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, in rtw8852a_ctrl_ch() 1075 rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, in rtw8852a_ctrl_ch() 1077 rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, in rtw8852a_ctrl_ch() 1079 rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0x2d011); in rtw8852a_ctrl_ch() 1080 rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0x1c02c); in rtw8852a_ctrl_ch() 1081 rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, in rtw8852a_ctrl_ch() [all …]
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| H A D | rtw8922a.c | 1399 rtw89_phy_write32_mask(rtwdev, R_MGAIN_BIAS, B_MGAIN_BIAS_BW20, in rtw8922a_set_rx_gain_normal_cck() 1401 rtw89_phy_write32_mask(rtwdev, R_MGAIN_BIAS, B_MGAIN_BIAS_BW40, in rtw8922a_set_rx_gain_normal_cck() 1405 rtw89_phy_write32_mask(rtwdev, R_CCK_RPL_OFST, B_CCK_RPL_OFST, in rtw8922a_set_rx_gain_normal_cck() 1408 rtw89_phy_write32_mask(rtwdev, R_MGAIN_BIAS, B_MGAIN_BIAS_BW20, 0); in rtw8922a_set_rx_gain_normal_cck() 1409 rtw89_phy_write32_mask(rtwdev, R_MGAIN_BIAS, B_MGAIN_BIAS_BW40, 0); in rtw8922a_set_rx_gain_normal_cck() 1412 rtw89_phy_write32_mask(rtwdev, R_CCK_RPL_OFST, B_CCK_RPL_OFST, in rtw8922a_set_rx_gain_normal_cck() 1433 rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[path], 0xff000000, value + 0xF8); in rtw8922a_set_rx_gain_normal_ofdm() 1442 rtw89_phy_write32_mask(rtwdev, rpl_bias_comp[path], 0xff, v1); in rtw8922a_set_rx_gain_normal_ofdm() 1443 rtw89_phy_write32_mask(rtwdev, rpl_ext_comp[path], 0xff, v2); in rtw8922a_set_rx_gain_normal_ofdm() 1444 rtw89_phy_write32_mask(rtwdev, rpl_ext_comp[path], 0xff00, v3); in rtw8922a_set_rx_gain_normal_ofdm() [all …]
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| H A D | rtw8922d.c | 476 rtw89_phy_write32_mask(rtwdev, R_SEL_GNT_BT_RX_BE4, in rtw8922d_sel_bt_rx_path() 479 rtw89_phy_write32_mask(rtwdev, R_SEL_GNT_BT_RX_BE4, in rtw8922d_sel_bt_rx_path() 1795 rtw89_phy_write32_mask(rtwdev, R_CL_MODE_TRIG_BE4, B_CL_MODE_TRIG_BE4, 1); in rtw8922d_path_diff_update() 1796 rtw89_phy_write32_mask(rtwdev, R_CL_MODE_TRIG_BE4, B_CL_MODE_TRIG_BE4, 0); in rtw8922d_path_diff_update() 1801 rtw89_phy_write32_mask(rtwdev, R_BF_SMO_PDP_LMT_EHT_BE4, in rtw8922d_path_diff_update() 1803 rtw89_phy_write32_mask(rtwdev, R_BF_SMO_PDP_LMT_HE_BE4, in rtw8922d_path_diff_update() 1805 rtw89_phy_write32_mask(rtwdev, R_BF_SMO_PDP_LMT_VHT_BE4, in rtw8922d_path_diff_update() 1808 rtw89_phy_write32_mask(rtwdev, R_OS_TRIG_BY_SW_BE4, in rtw8922d_path_diff_update() 1810 rtw89_phy_write32_mask(rtwdev, R_OS_TRIG_SOURCE_BE4, in rtw8922d_path_diff_update() 1820 rtw89_phy_write32_mask(rtwdev, R_SELECTED_TONE_IDX_BE4, in rtw8922d_path_diff_update() [all …]
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| H A D | rtw8852bt.c | 484 rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x0); in rtw8852bt_bb_reset_en() 485 rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x0); in rtw8852bt_bb_reset_en() 487 rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x1); in rtw8852bt_bb_reset_en() 488 rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x1); in rtw8852bt_bb_reset_en() 501 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, in rtw8852bt_bb_reset() 504 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, in rtw8852bt_bb_reset() 508 rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, in rtw8852bt_bb_reset() 511 rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, in rtw8852bt_bb_reset() 532 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x0); in rtw8852bt_tssi_cont_en() 534 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x1); in rtw8852bt_tssi_cont_en() [all …]
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| H A D | rtw8852b.c | 600 rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x0); in rtw8852b_bb_reset_en() 601 rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x0); in rtw8852b_bb_reset_en() 603 rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x1); in rtw8852b_bb_reset_en() 604 rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x1); in rtw8852b_bb_reset_en() 645 rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], B_P0_TXPW_RSTB_MANON, 0x0); in rtw8852b_tssi_cont_en() 646 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x0); in rtw8852b_tssi_cont_en() 648 rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], B_P0_TXPW_RSTB_MANON, 0x1); in rtw8852b_tssi_cont_en() 649 rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x1); in rtw8852b_tssi_cont_en() 670 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0); in rtw8852b_adc_en() 672 rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0xf); in rtw8852b_adc_en()
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| H A D | phy_be.c | 477 rtw89_phy_write32_mask(rtwdev, R_GOTX_IQKDPK_C0, B_GOTX_IQKDPK, 0x3); in rtw89_phy_preinit_rf_nctl_be() 478 rtw89_phy_write32_mask(rtwdev, R_GOTX_IQKDPK_C1, B_GOTX_IQKDPK, 0x3); in rtw89_phy_preinit_rf_nctl_be() 479 rtw89_phy_write32_mask(rtwdev, R_IQKDPK_HC, B_IQKDPK_HC, 0x1); in rtw89_phy_preinit_rf_nctl_be() 480 rtw89_phy_write32_mask(rtwdev, R_CLK_GCK, B_CLK_GCK, 0x00fffff); in rtw89_phy_preinit_rf_nctl_be() 481 rtw89_phy_write32_mask(rtwdev, R_IOQ_IQK_DPK, B_IOQ_IQK_DPK_CLKEN, 0x3); in rtw89_phy_preinit_rf_nctl_be() 482 rtw89_phy_write32_mask(rtwdev, R_IQK_DPK_RST, B_IQK_DPK_RST, 0x1); in rtw89_phy_preinit_rf_nctl_be() 483 rtw89_phy_write32_mask(rtwdev, R_IQK_DPK_PRST, B_IQK_DPK_PRST, 0x1); in rtw89_phy_preinit_rf_nctl_be() 484 rtw89_phy_write32_mask(rtwdev, R_IQK_DPK_PRST_C1, B_IQK_DPK_PRST, 0x1); in rtw89_phy_preinit_rf_nctl_be() 485 rtw89_phy_write32_mask(rtwdev, R_TXRFC, B_TXRFC_RST, 0x1); in rtw89_phy_preinit_rf_nctl_be() 488 rtw89_phy_write32_mask(rtwdev, R_IQK_DPK_RST_C1, B_IQK_DPK_RST, 0x1); in rtw89_phy_preinit_rf_nctl_be() [all …]
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| H A D | phy.c | 969 rtw89_phy_write32_mask(rtwdev, R_SWSI_READ_ADDR_V1, B_SWSI_READ_ADDR_V1, val); in rtw89_phy_read_rf_a() 1010 rtw89_phy_write32_mask(rtwdev, addr_ofst[rf_path], B_HWSI_ADD_CTL_MASK, 0x1); in rtw89_phy_read_full_rf_v2_a() 1019 rtw89_phy_write32_mask(rtwdev, addr_ofst[rf_path], B_HWSI_ADD_MASK, addr); in rtw89_phy_read_full_rf_v2_a() 1020 rtw89_phy_write32_mask(rtwdev, addr_ofst[rf_path], B_HWSI_ADD_RD, 0x1); in rtw89_phy_read_full_rf_v2_a() 1034 rtw89_phy_write32_mask(rtwdev, addr_ofst[rf_path], B_HWSI_ADD_POLL_MASK, 0); in rtw89_phy_read_full_rf_v2_a() 1086 rtw89_phy_write32_mask(rtwdev, R_SW_SI_READ_ADDR_BE4, B_SW_SI_READ_ADDR_BE4, val); in rtw89_phy_read_full_rf_v3_a() 1144 rtw89_phy_write32_mask(rtwdev, direct_addr, mask, data); in rtw89_phy_write_rf() 1174 rtw89_phy_write32_mask(rtwdev, R_SWSI_BIT_MASK_V1, RFREG_MASK, in rtw89_phy_write_rf_a() 1185 rtw89_phy_write32_mask(rtwdev, R_SWSI_DATA_V1, MASKDWORD, val); in rtw89_phy_write_rf_a() 2116 rtw89_phy_write32_mask(rtwdev, addr, mask, data); in rtw89_phy_write32_idx() [all …]
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| H A D | phy.h | 754 static inline void rtw89_phy_write32_mask(struct rtw89_dev *rtwdev, in rtw89_phy_write32_mask() function
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| H A D | fw.c | 3263 rtw89_phy_write32_mask(rtwdev, R_CHK_LPS_STAT, B_CHK_LPS_STAT, 0); in rtw89_fw_h2c_lps_ch_info() 3364 rtw89_phy_write32_mask(rtwdev, R_CHK_LPS_STAT, B_CHK_LPS_STAT, 0); in rtw89_fw_h2c_lps_ml_cmn_info() 3519 rtw89_phy_write32_mask(rtwdev, R_CHK_LPS_STAT_BE4, B_CHK_LPS_STAT, 0); in rtw89_fw_h2c_lps_ml_cmn_info_v1()
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