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Searched refs:relaxed (Results 1 – 25 of 31) sorted by relevance

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/linux/rust/kernel/sync/atomic/
H A Dinternal.rs224 fn xchg[acquire, release, relaxed](a: &AtomicRepr<Self>, v: Self) -> Self {
235 fn try_cmpxchg[acquire, release, relaxed](
260 fn fetch_add[acquire, release, relaxed](a: &AtomicRepr<Self>, v: Self::Delta) -> Self {
/linux/scripts/atomic/kerneldoc/
H A Ddec_unless_positive7 * Otherwise, @v is not modified and relaxed ordering is provided.
H A Dinc_not_zero7 * Otherwise, @v is not modified and relaxed ordering is provided.
H A Dinc_unless_negative7 * Otherwise, @v is not modified and relaxed ordering is provided.
H A Ddec_if_positive7 * Otherwise, @v is not modified and relaxed ordering is provided.
H A Dcmpxchg9 * Otherwise, @v is not modified and relaxed ordering is provided.
H A Dadd_unless13 * Otherwise, @v is not modified and relaxed ordering is provided.
H A Dtry_cmpxchg10 * and relaxed ordering is provided.
/linux/scripts/atomic/
H A Datomics.tbl4 # Upper-case implies _{acquire,release,relaxed} variants.
/linux/tools/memory-model/Documentation/
H A Dcheatsheet.txt20 Key: Relaxed: A relaxed operation is either READ_ONCE(), WRITE_ONCE(),
/linux/lib/
H A DKconfig.kmsan38 is a more relaxed mode, but it generates more instrumentation code and
/linux/include/linux/
H A Dcoresight.h131 u64 (*read)(u32 offset, bool relaxed, bool _64bit);
132 void (*write)(u64 val, u32 offset, bool relaxed,
/linux/Documentation/filesystems/
H A Disofs.rst33 check=relaxed Matches filenames with different cases
H A Dnilfs2.rst66 order=relaxed(*) Apply relaxed order semantics that allows modified data
H A Dvfat.rst118 **r**: relaxed, case insensitive
/linux/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop.h55 bool relaxed; member
/linux/drivers/scsi/csiostor/
H A Dcsio_mb.c495 int relaxed = !(hw->flags & CSIO_HWF_ROOT_NO_RELAXED_ORDERING); in csio_mb_iq_write() local
542 FW_IQ_CMD_FL0FETCHRO_V(relaxed) | in csio_mb_iq_write()
543 FW_IQ_CMD_FL0DATARO_V(relaxed) | in csio_mb_iq_write()
/linux/arch/mips/configs/
H A Dloongson3_defconfig414 CONFIG_CMDLINE="ieee754=relaxed"
/linux/drivers/net/ethernet/chelsio/cxgb4vf/
H A Dsge.c2210 int relaxed = !(adapter->flags & CXGB4VF_ROOT_NO_RELAXED_ORDERING); in t4vf_sge_alloc_rxq() local
2307 FW_IQ_CMD_FL0FETCHRO_V(relaxed) | in t4vf_sge_alloc_rxq()
2308 FW_IQ_CMD_FL0DATARO_V(relaxed) | in t4vf_sge_alloc_rxq()
/linux/Documentation/networking/
H A Dmsg_zerocopy.rst261 loopback restriction can be temporarily relaxed by making
/linux/Documentation/
H A Dmemory-barriers.txt136 abstract CPU, memory operation ordering is very relaxed, and a CPU may actually
513 RELEASE variants in addition to fully-ordered and relaxed (no barrier
1872 however, be used to control MMIO effects on accesses through relaxed memory I/O
2495 to an I/O memory window with relaxed memory access properties, then _mandatory_
2529 address register if ordering rules are sufficiently relaxed:
2534 If ordering rules are relaxed, it must be assumed that accesses done inside an
2670 frv), and so the most relaxed case (namely DEC Alpha) must be assumed outside
2911 The DEC Alpha CPU is one of the most relaxed CPUs there is. Not only that,
/linux/tools/perf/Documentation/
H A Dperf-list.txt244 /sys/kernel/tracing, even when perf_event_paranoid is in a relaxed
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dsge.c4369 int relaxed = !(adap->flags & CXGB4_ROOT_NO_RELAXED_ORDERING); in t4_sge_alloc_rxq() local
4426 FW_IQ_CMD_FL0FETCHRO_V(relaxed) | in t4_sge_alloc_rxq()
4427 FW_IQ_CMD_FL0DATARO_V(relaxed) | in t4_sge_alloc_rxq()
/linux/Documentation/kbuild/
H A Dkconfig-language.rst591 Such a dependency can be relaxed by combining it with the compile-testing rule
/linux/Documentation/dev-tools/
H A Dcheckpatch.rst1008 declarations at the top of the function rule can be relaxed. Not doing

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