Home
last modified time | relevance | path

Searched refs:pll_params (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/clk/tegra/
H A Dclk-pll.c1208 static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params, in _pll_fixed_mdiv() argument
1211 u16 mdiv = parent_rate / pll_params->cf_min; in _pll_fixed_mdiv()
1213 if (pll_params->flags & TEGRA_MDIV_NEW) in _pll_fixed_mdiv()
1214 return (!pll_params->mdiv_default ? mdiv : in _pll_fixed_mdiv()
1215 min(mdiv, pll_params->mdiv_default)); in _pll_fixed_mdiv()
1217 if (pll_params->mdiv_default) in _pll_fixed_mdiv()
1218 return pll_params->mdiv_default; in _pll_fixed_mdiv()
1220 if (parent_rate > pll_params->cf_max) in _pll_fixed_mdiv()
1273 static int _setup_dynamic_ramp(struct tegra_clk_pll_params *pll_params, in _setup_dynamic_ramp() argument
1302 val = step_a << pll_params->stepa_shift; in _setup_dynamic_ramp()
[all …]
H A Dclk.h344 unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params,
397 struct tegra_clk_pll_params *pll_params; member
406 unsigned long flags, struct tegra_clk_pll_params *pll_params,
411 unsigned long flags, struct tegra_clk_pll_params *pll_params,
417 struct tegra_clk_pll_params *pll_params,
423 struct tegra_clk_pll_params *pll_params,
429 struct tegra_clk_pll_params *pll_params,
435 struct tegra_clk_pll_params *pll_params,
441 struct tegra_clk_pll_params *pll_params,
447 struct tegra_clk_pll_params *pll_params,
[all …]
H A Dclk-tegra-periph.c941 struct tegra_clk_pll_params *pll_params) in init_pllp() argument
951 pmc_base, 0, pll_params, NULL); in init_pllp()
1024 struct tegra_clk_pll_params *pll_params) in tegra_periph_clk_init() argument
1026 init_pllp(clk_base, pmc_base, tegra_clks, pll_params); in tegra_periph_clk_init()
H A Dclk-tegra-audio.c184 clk_base, pmc_base, 0, info->pll_params, in tegra_audio_clk_init()
/linux/drivers/phy/st/
H A Dphy-stm32-usbphyc.c131 struct pll_params { struct
205 struct pll_params *pll_params) in stm32_usbphyc_get_pll_params() argument
223 pll_params->ndiv = (u8)ndiv; in stm32_usbphyc_get_pll_params()
228 pll_params->frac = (u16)frac; in stm32_usbphyc_get_pll_params()
233 struct pll_params pll_params; in stm32_usbphyc_pll_init() local
245 stm32_usbphyc_get_pll_params(clk_rate, &pll_params); in stm32_usbphyc_pll_init()
246 ndiv = FIELD_PREP(PLLNDIV, pll_params.ndiv); in stm32_usbphyc_pll_init()
247 frac = FIELD_PREP(PLLFRACIN, pll_params.frac); in stm32_usbphyc_pll_init()
251 if (pll_params.frac) in stm32_usbphyc_pll_init()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_cx0_phy.c3784 const struct intel_cx0pll_params *pll_params) in intel_c10pll_verify_params() argument
3788 …intel_c10pll_verify_clock(display, pll_params->clock_rate, pll_params->name, pll_params->c10, true… in intel_c10pll_verify_params()
3790 if (!pll_params->is_hdmi) in intel_c10pll_verify_params()
3793 intel_snps_hdmi_pll_compute_c10pll(&pll_state, pll_params->clock_rate); in intel_c10pll_verify_params()
3795 intel_c10pll_verify_clock(display, pll_params->clock_rate, pll_params->name, &pll_state, false); in intel_c10pll_verify_params()
3830 const struct intel_cx0pll_params *pll_params) in intel_c20pll_verify_params() argument
3834 …intel_c20pll_verify_clock(display, pll_params->clock_rate, pll_params->name, pll_params->c20, true… in intel_c20pll_verify_params()
3836 if (!pll_params->is_hdmi) in intel_c20pll_verify_params()
3839 if (intel_c20_compute_hdmi_tmds_pll(display, pll_params->clock_rate, &pll_state) != 0) in intel_c20pll_verify_params()
3842 intel_c20pll_verify_clock(display, pll_params->clock_rate, pll_params->name, &pll_state, false); in intel_c20pll_verify_params()
H A Dintel_lt_phy.c2330 const struct intel_lt_phy_pll_params *pll_params) in intel_lt_phy_pll_verify_params() argument
2334 …intel_lt_phy_pll_verify_clock(display, pll_params->clock_rate, pll_params->name, pll_params->state… in intel_lt_phy_pll_verify_params()
2336 if (!pll_params->is_hdmi) in intel_lt_phy_pll_verify_params()
2339 if (intel_lt_phy_calculate_hdmi_state(&pll_state, pll_params->clock_rate) != 0) in intel_lt_phy_pll_verify_params()
2342 …intel_lt_phy_pll_verify_clock(display, pll_params->clock_rate, pll_params->name, &pll_state, false… in intel_lt_phy_pll_verify_params()