| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml_display_rq_dlg_calc.c | 41 const dml_uint_t pipe_idx) in dml_rq_dlg_get_rq_reg() argument
43 dml_uint_t plane_idx = dml_get_plane_idx(mode_lib, pipe_idx); in dml_rq_dlg_get_rq_reg()
71 dml_print("DML_DLG::%s: Calculation for pipe[%d] start\n", __func__, pipe_idx); in dml_rq_dlg_get_rq_reg()
84 dpte_group_bytes = (dml_uint_t)(dml_get_dpte_group_size_in_bytes(mode_lib, pipe_idx)); in dml_rq_dlg_get_rq_reg()
85 mpte_group_bytes = (dml_uint_t)(dml_get_vm_group_size_in_bytes(mode_lib, pipe_idx)); in dml_rq_dlg_get_rq_reg()
128 detile_buf_size_in_bytes = (dml_uint_t)(dml_get_det_buffer_size_kbytes(mode_lib, pipe_idx) * 1024); in dml_rq_dlg_get_rq_reg()
130 pte_row_height_linear = (dml_uint_t)(dml_get_dpte_row_height_linear_l(mode_lib, pipe_idx)); in dml_rq_dlg_get_rq_reg()
138 …nt_t p1_pte_row_height_linear = (dml_uint_t)(dml_get_dpte_row_height_linear_c(mode_lib, pipe_idx)); in dml_rq_dlg_get_rq_reg()
145 …_l.swath_height = (dml_uint_t)(dml_log2((dml_float_t) dml_get_swath_height_l(mode_lib, pipe_idx))); in dml_rq_dlg_get_rq_reg()
146 …_c.swath_height = (dml_uint_t)(dml_log2((dml_float_t) dml_get_swath_height_c(mode_lib, pipe_idx))); in dml_rq_dlg_get_rq_reg()
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| H A D | dml2_dc_resource_mgmt.c | 132 …_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pipe_idx], &plane_id_assig… in find_master_pipe_of_plane()
155 ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[pipe->pipe_idx], in find_pipes_assigned_to_plane()
163 pipes[num_found++] = mpc_pipe->pipe_idx; in find_pipes_assigned_to_plane()
278 if (head_pipe && head_pipe->pipe_idx == i) in find_preferred_pipe_candidates()
319 if (head_pipe && head_pipe->pipe_idx == i) in find_last_resort_pipe_candidates()
331 static bool is_pipe_in_candidate_array(const unsigned int pipe_idx, in is_pipe_in_candidate_array() argument
338 if (candidate_array[i] == pipe_idx) in is_pipe_in_candidate_array()
375 pipe->pipe_idx = (uint8_t)preferred_pipe_candidates[i]; in find_more_pipes_for_stream()
376 assigned_pipes[(*assigned_pipe_count)++] = pipe->pipe_idx; in find_more_pipes_for_stream()
392 pipe->pipe_idx = (uint8_t)i; in find_more_pipes_for_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_lib.h | 57 const unsigned int pipe_idx,
75 const unsigned int pipe_idx);
80 const unsigned int pipe_idx);
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| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn6_calcs_dchub.c | 682 const unsigned int pipe_idx, in dcn6_rq_dlg_get_dlg_reg() argument
689 DML_LOG_VERBOSE("DML_DLG::%s: Calculation for pipe_idx=%d\n", __func__, pipe_idx); in dcn6_rq_dlg_get_dlg_reg()
691 l->plane_idx = mode_lib->mp.pipe_plane[pipe_idx]; in dcn6_rq_dlg_get_dlg_reg()
760 …l->pipe_idx_in_combine = pipe_idx - l->first_pipe_idx_in_plane; // DML assumes the pipes in the sa… in dcn6_rq_dlg_get_dlg_reg()
763 DML_LOG_VERBOSE("DML_DLG: %s: pipe_idx = %d\n", __func__, pipe_idx); in dcn6_rq_dlg_get_dlg_reg()
776 l->min_ttu_vblank = mode_lib->mp.MinTTUVBlank[mode_lib->mp.pipe_plane[pipe_idx]]; in dcn6_rq_dlg_get_dlg_reg()
777 …_next_start = (unsigned int)(mode_lib->mp.MIN_DST_Y_NEXT_START[mode_lib->mp.pipe_plane[pipe_idx]]); in dcn6_rq_dlg_get_dlg_reg()
783 …vcount0 = (unsigned int)(mode_lib->mp.VREADY_AT_OR_AFTER_VSYNC[mode_lib->mp.pipe_plane[pipe_idx]]); in dcn6_rq_dlg_get_dlg_reg()
788 …t_x_after_scaler = (unsigned int)(mode_lib->mp.DSTXAfterScaler[mode_lib->mp.pipe_plane[pipe_idx]]); in dcn6_rq_dlg_get_dlg_reg()
789 …t_y_after_scaler = (unsigned int)(mode_lib->mp.DSTYAfterScaler[mode_lib->mp.pipe_plane[pipe_idx]]); in dcn6_rq_dlg_get_dlg_reg()
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| H A D | dml2_core_dcn5_calcs_dchub.c | 5389 unsigned int pipe_idx) in dcn5_rq_dlg_get_rq_reg() argument
5391 unsigned int plane_idx = mode_lib->mp.pipe_plane[pipe_idx]; in dcn5_rq_dlg_get_rq_reg()
5411 DML_LOG_VERBOSE("DML_DLG::%s: Calculation for pipe[%d] start\n", __func__, pipe_idx); in dcn5_rq_dlg_get_rq_reg()
5419 …dpte_group_bytes = (unsigned int)(mode_lib->mp.dpte_group_bytes[mode_lib->mp.pipe_plane[pipe_idx]]… in dcn5_rq_dlg_get_rq_reg()
5420 mpte_group_bytes = (unsigned int)(mode_lib->mp.vm_group_bytes[mode_lib->mp.pipe_plane[pipe_idx]]); in dcn5_rq_dlg_get_rq_reg()
5431 rq_regs->pte_buffer_mode = mode_lib->mp.PTE_BUFFER_MODE[mode_lib->mp.pipe_plane[pipe_idx]]; in dcn5_rq_dlg_get_rq_reg()
5432 …s->force_one_row_for_frame = mode_lib->mp.use_one_row_for_frame[mode_lib->mp.pipe_plane[pipe_idx]]; in dcn5_rq_dlg_get_rq_reg()
5454 …detile_buf_size_in_bytes = mode_lib->mp.DETBufferSizeInKByte[mode_lib->mp.pipe_plane[pipe_idx]] * … in dcn5_rq_dlg_get_rq_reg()
5457 … p0_pte_row_height_linear = mode_lib->mp.dpte_row_height_linear[mode_lib->mp.pipe_plane[pipe_idx]]; in dcn5_rq_dlg_get_rq_reg()
5463 …_row_height_linear = mode_lib->mp.dpte_row_height_linear_chroma[mode_lib->mp.pipe_plane[pipe_idx]]; in dcn5_rq_dlg_get_rq_reg()
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| H A D | dml2_core_utils.c | 403 unsigned int pipe_idx = 0; in dml2_core_utils_pipe_plane_mapping() local
411 pipe_plane[pipe_idx] = plane_idx; in dml2_core_utils_pipe_plane_mapping()
412 pipe_idx++; in dml2_core_utils_pipe_plane_mapping()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | display_rq_dlg_calc_32.h | 48 const unsigned int pipe_idx);
68 const unsigned int pipe_idx);
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 1688 int pipe_idx = sec_pipe->pipe_idx; in dcn30_split_stream_for_mpc_or_odm() local
1693 sec_pipe->pipe_idx = (uint8_t)pipe_idx; in dcn30_split_stream_for_mpc_or_odm()
1694 sec_pipe->plane_res.mi = pool->mis[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1695 sec_pipe->plane_res.hubp = pool->hubps[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1696 sec_pipe->plane_res.ipp = pool->ipps[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1697 sec_pipe->plane_res.xfm = pool->transforms[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1698 sec_pipe->plane_res.dpp = pool->dpps[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1699 sec_pipe->plane_res.mpcc_inst = (uint8_t)pool->dpps[pipe_idx]->inst; in dcn30_split_stream_for_mpc_or_odm()
1719 sec_pipe->stream_res.opp = pool->opps[pipe_idx]; in dcn30_split_stream_for_mpc_or_odm()
1723 dcn20_acquire_dsc(dc, res_ctx, &sec_pipe->stream_res.dsc, pipe_idx); in dcn30_split_stream_for_mpc_or_odm()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_resource.c | 1734 pipe_ctx->pipe_idx, in resource_build_scaling_params()
1880 int preferred_pipe_idx = (pool->pipe_count - 1) - primary_pipe->pipe_idx; in resource_find_free_secondary_pipe_legacy()
1883 secondary_pipe->pipe_idx = (uint8_t)preferred_pipe_idx; in resource_find_free_secondary_pipe_legacy()
1895 secondary_pipe->pipe_idx = (uint8_t)i; in resource_find_free_secondary_pipe_legacy()
1914 new_pipe = &new_res_ctx->pipe_ctx[cur_sec_opp_head->pipe_idx]; in resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master()
1916 free_pipe_idx = cur_sec_opp_head->pipe_idx; in resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master()
1940 new_pipe = &new_res_ctx->pipe_ctx[cur_sec_dpp->pipe_idx]; in resource_find_free_pipe_used_in_cur_mpc_blending_tree()
1942 free_pipe_idx = cur_sec_dpp->pipe_idx; in resource_find_free_pipe_used_in_cur_mpc_blending_tree()
2101 struct pipe_ctx *opp_head = &res_ctx->pipe_ctx[otg_master->pipe_idx]; in resource_get_opp_heads_for_otg_master()
2126 struct pipe_ctx *pipe = &res_ctx->pipe_ctx[opp_head->pipe_idx]; in resource_get_dpp_pipes_for_opp_head()
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| H A D | dc.c | 1413 pipe_split_change = context->res_ctx.pipe_ctx[i].top_pipe->pipe_idx != in disable_dangling_plane()
1414 dc->current_state->res_ctx.pipe_ctx[i].top_pipe->pipe_idx; in disable_dangling_plane()
2642 unsigned int pipe_idx; in dc_acquire_release_mpc_3dlut() local
2652 for (pipe_idx = 0; pipe_idx < pool->pipe_count; pipe_idx++) { in dc_acquire_release_mpc_3dlut()
2653 if (res_ctx->pipe_ctx[pipe_idx].stream == stream) { in dc_acquire_release_mpc_3dlut()
2655 mpcc_id = res_ctx->pipe_ctx[pipe_idx].plane_res.hubp->inst; in dc_acquire_release_mpc_3dlut()
2738 context->res_ctx.pipe_ctx[i].pipe_idx = (uint8_t)i; in dc_post_update_surfaces_to_stream()
4584 update_dirty_rect->pipe_idx = (uint8_t)j; in dc_dmub_update_dirty_rect()
4645 update_dirty_rect->pipe_idx = (uint8_t)j; in build_dmub_update_dirty_rect()
4872 unsigned int j, pipe_idx; in commit_planes_for_stream() local
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 2822 cur_opp_head = &cur_res_ctx->pipe_ctx[new_opp_head->pipe_idx]; in dcn32_find_optimal_free_pipe_as_secondary_dpp_pipe()
2881 primary_index = primary_pipe->pipe_idx; in find_idle_secondary_pipe_check_mpo()
2887 preferred_pipe_idx = (pool->pipe_count - 1) - primary_pipe->pipe_idx; in find_idle_secondary_pipe_check_mpo()
2889 !(next_odm_mpo_pipe && next_odm_mpo_pipe->pipe_idx == preferred_pipe_idx)) { in find_idle_secondary_pipe_check_mpo()
2891 secondary_pipe->pipe_idx = (uint8_t)preferred_pipe_idx; in find_idle_secondary_pipe_check_mpo()
2902 !(next_odm_mpo_pipe && next_odm_mpo_pipe->pipe_idx == i)) { in find_idle_secondary_pipe_check_mpo()
2904 secondary_pipe->pipe_idx = (uint8_t)i; in find_idle_secondary_pipe_check_mpo()
2934 head_index = head_pipe->pipe_idx; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
2936 if (pipe->bottom_pipe && res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx].stream == NULL) { in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
2937 idle_pipe = &res_ctx->pipe_ctx[pipe->bottom_pipe->pipe_idx]; in dcn32_acquire_idle_pipe_for_head_pipe_in_layer()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| H A D | display_rq_dlg_calc_21.h | 66 const unsigned int pipe_idx,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | display_rq_dlg_calc_20.h | 66 const unsigned int pipe_idx,
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| H A D | display_rq_dlg_calc_20v2.h | 66 const unsigned int pipe_idx,
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| H A D | dcn20_fpu.h | 72 int pipe_idx,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | display_rq_dlg_calc_31.h | 62 const unsigned int pipe_idx,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | display_rq_dlg_calc_314.h | 63 const unsigned int pipe_idx,
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | display_rq_dlg_calc_30.h | 62 const unsigned int pipe_idx,
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn60/ |
| H A D | dcn60_resource.c | 880 int pipe_idx; in build_mcache_pipe_regs_config() local
882 for (pipe_idx = 0; pipe_idx < MAX_PIPES; pipe_idx++) { in build_mcache_pipe_regs_config()
883 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; in build_mcache_pipe_regs_config()
974 int pipe_idx; in dcn50_program_mcache_pipe_config() local
980 for (pipe_idx = 0; pipe_idx < MAX_PIPES; pipe_idx++) { in dcn50_program_mcache_pipe_config()
981 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[pipe_idx]; in dcn50_program_mcache_pipe_config()
984 pipe_ctx->mcache_regs.main.p0.mcache_id_first = pipe_ctx->pipe_idx; in dcn50_program_mcache_pipe_config()
985 pipe_ctx->mcache_regs.mall.p0.mcache_id_first = pipe_ctx->pipe_idx; in dcn50_program_mcache_pipe_config()
988 pipe_ctx->mcache_regs.main.p1.mcache_id_first = pipe_ctx->pipe_idx; in dcn50_program_mcache_pipe_config()
989 pipe_ctx->mcache_regs.mall.p1.mcache_id_first = pipe_ctx->pipe_idx; in dcn50_program_mcache_pipe_config()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v12.c | 397 int pipe_idx; in get_wave_count() local
406 pipe_idx = queue_idx / adev->gfx.mec.num_queue_per_pipe; in get_wave_count()
408 soc24_grbm_select(adev, 1, pipe_idx, queue_slot, 0); in get_wave_count()
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| H A D | amdgpu_amdkfd_gfx_v12_1.c | 400 int pipe_idx; in get_wave_count() local
409 pipe_idx = queue_idx / adev->gfx.mec.num_queue_per_pipe; in get_wave_count()
411 amdgpu_gfx_select_me_pipe_q(adev, 1, pipe_idx, queue_slot, 0, inst); in get_wave_count()
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| H A D | amdgpu_amdkfd_gfx_v11.c | 836 int pipe_idx; in get_wave_count() local
845 pipe_idx = queue_idx / adev->gfx.mec.num_queue_per_pipe; in get_wave_count()
847 soc21_grbm_select(adev, 1, pipe_idx, queue_slot, 0); in get_wave_count()
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| H A D | amdgpu_amdkfd_gfx_v9.c | 953 int pipe_idx; in get_wave_count() local
962 pipe_idx = queue_idx / adev->gfx.mec.num_queue_per_pipe; in get_wave_count()
964 soc15_grbm_select(adev, 1, pipe_idx, queue_slot, 0, GET_INST(GC, inst)); in get_wave_count()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn60/ |
| H A D | dcn60_hwseq.c | 217 check_syncd_pipes_for_disabled_master_pipe(dc, context, pipe_ctx->pipe_idx); in dcn60_apply_single_controller_ctx_to_hw()
796 stream_idx = top_pipe->pipe_idx; in dcn60_update_cursor_offload_pipe()
800 p = &cs->offload_streams[stream_idx].payloads[payload_idx].pipe_data[pipe->pipe_idx].dcn60; in dcn60_update_cursor_offload_pipe()
837 cs->offload_streams[stream_idx].payloads[payload_idx].pipe_mask |= (1u << pipe->pipe_idx); in dcn60_update_cursor_offload_pipe()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 1348 pipe_ctx->pipe_idx); in deallocate_mst_payload()
1414 pipe_ctx->pipe_idx); in allocate_mst_payload()
1625 pipe_ctx->pipe_idx); in update_sst_payload()
1715 pipe_ctx->pipe_idx); in link_reduce_mst_payload()
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