| /linux/drivers/net/ethernet/intel/i40e/ |
| H A D | i40e_hmc.c | 114 u64 *pd_addr; in i40e_add_pd_table_entry() local
151 pd_addr = (u64 *)pd_table->pd_page_addr.va; in i40e_add_pd_table_entry()
152 pd_addr += rel_pd_idx; in i40e_add_pd_table_entry()
155 memcpy(pd_addr, &page_desc, sizeof(u64)); in i40e_add_pd_table_entry()
190 u64 *pd_addr; in i40e_remove_pd_bp() local
216 pd_addr = (u64 *)pd_table->pd_page_addr.va; in i40e_remove_pd_bp()
217 pd_addr += rel_pd_idx; in i40e_remove_pd_bp()
218 memset(pd_addr, 0, sizeof(u64)); in i40e_remove_pd_bp()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vcn_sw_ring.c | 66 uint32_t vmid, uint64_t pd_addr) in vcn_dec_sw_ring_emit_vm_flush() argument
71 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_dec_sw_ring_emit_vm_flush()
75 data1 = lower_32_bits(pd_addr); in vcn_dec_sw_ring_emit_vm_flush()
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| H A D | vcn_v2_0.h | 37 unsigned vmid, uint64_t pd_addr);
50 unsigned int vmid, uint64_t pd_addr);
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| H A D | vcn_v4_0_3.h | 41 unsigned int vmid, uint64_t pd_addr);
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| H A D | vcn_sw_ring.h | 40 uint32_t vmid, uint64_t pd_addr);
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| H A D | jpeg_v4_0_3.h | 65 unsigned int vmid, uint64_t pd_addr);
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| H A D | jpeg_v2_0.c | 641 unsigned vmid, uint64_t pd_addr) in jpeg_v2_0_dec_ring_emit_vm_flush() argument
646 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in jpeg_v2_0_dec_ring_emit_vm_flush()
650 data1 = lower_32_bits(pd_addr); in jpeg_v2_0_dec_ring_emit_vm_flush()
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| H A D | gmc_v11_0.c | 352 unsigned int vmid, uint64_t pd_addr) in gmc_v11_0_emit_flush_gpu_tlb() argument
375 lower_32_bits(pd_addr)); in gmc_v11_0_emit_flush_gpu_tlb()
379 upper_32_bits(pd_addr)); in gmc_v11_0_emit_flush_gpu_tlb()
396 return pd_addr; in gmc_v11_0_emit_flush_gpu_tlb()
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| H A D | gmc_v10_0.c | 360 unsigned int vmid, uint64_t pd_addr) in gmc_v10_0_emit_flush_gpu_tlb() argument
383 lower_32_bits(pd_addr)); in gmc_v10_0_emit_flush_gpu_tlb()
387 upper_32_bits(pd_addr)); in gmc_v10_0_emit_flush_gpu_tlb()
404 return pd_addr; in gmc_v10_0_emit_flush_gpu_tlb()
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| H A D | gmc_v12_0.c | 389 unsigned vmid, uint64_t pd_addr) in gmc_v12_0_emit_flush_gpu_tlb() argument
412 lower_32_bits(pd_addr)); in gmc_v12_0_emit_flush_gpu_tlb()
416 upper_32_bits(pd_addr)); in gmc_v12_0_emit_flush_gpu_tlb()
433 return pd_addr; in gmc_v12_0_emit_flush_gpu_tlb()
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| H A D | vcn_v2_0.c | 1613 unsigned vmid, uint64_t pd_addr) in vcn_v2_0_dec_ring_emit_vm_flush() argument
1618 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush()
1622 data1 = lower_32_bits(pd_addr); in vcn_v2_0_dec_ring_emit_vm_flush()
1773 unsigned int vmid, uint64_t pd_addr) in vcn_v2_0_enc_ring_emit_vm_flush() argument
1777 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in vcn_v2_0_enc_ring_emit_vm_flush()
1782 lower_32_bits(pd_addr), 0xffffffff); in vcn_v2_0_enc_ring_emit_vm_flush()
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| H A D | amdgpu_gmc.c | 138 uint64_t pd_addr; in amdgpu_gmc_pd_addr() local
144 amdgpu_gmc_get_pde_for_bo(bo, -1, &pd_addr, &flags); in amdgpu_gmc_pd_addr()
145 pd_addr |= flags; in amdgpu_gmc_pd_addr()
147 pd_addr = amdgpu_bo_gpu_offset(bo); in amdgpu_gmc_pd_addr()
149 return pd_addr; in amdgpu_gmc_pd_addr()
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| H A D | jpeg_v4_0_3.c | 960 unsigned int vmid, uint64_t pd_addr) in jpeg_v4_0_3_dec_ring_emit_vm_flush() argument
965 pd_addr = amdgpu_gmc_emit_flush_gpu_tlb(ring, vmid, pd_addr); in jpeg_v4_0_3_dec_ring_emit_vm_flush()
969 data1 = lower_32_bits(pd_addr); in jpeg_v4_0_3_dec_ring_emit_vm_flush()
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| H A D | gmc_v6_0.c | 355 unsigned int vmid, uint64_t pd_addr) in gmc_v6_0_flush_gpu_tlb()
364 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v6_0_emit_flush_gpu_tlb()
369 return pd_addr; in gmc_v6_0_emit_flush_gpu_tlb()
361 gmc_v6_0_emit_flush_gpu_tlb(struct amdgpu_ring * ring,unsigned int vmid,uint64_t pd_addr) gmc_v6_0_emit_flush_gpu_tlb() argument
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| H A D | gmc_v9_0.c | 921 unsigned int vmid, uint64_t pd_addr) in gmc_v9_0_emit_flush_gpu_tlb() argument
945 lower_32_bits(pd_addr)); in gmc_v9_0_emit_flush_gpu_tlb()
949 upper_32_bits(pd_addr)); in gmc_v9_0_emit_flush_gpu_tlb()
966 return pd_addr; in gmc_v9_0_emit_flush_gpu_tlb()
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| H A D | gmc_v7_0.c | 472 unsigned int vmid, uint64_t pd_addr) in gmc_v7_0_flush_gpu_tlb()
480 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v7_0_emit_flush_gpu_tlb()
485 return pd_addr; in gmc_v7_0_emit_flush_gpu_tlb()
478 gmc_v7_0_emit_flush_gpu_tlb(struct amdgpu_ring * ring,unsigned int vmid,uint64_t pd_addr) gmc_v7_0_emit_flush_gpu_tlb() argument
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| H A D | vce_v3_0.c | 879 unsigned int vmid, uint64_t pd_addr) in vce_v3_0_emit_vm_flush() argument
883 amdgpu_ring_write(ring, pd_addr >> 12); in vce_v3_0_emit_vm_flush()
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | radeon_trace.h | 108 TP_PROTO(uint64_t pd_addr, unsigned ring, unsigned id),
109 TP_ARGS(pd_addr, ring, id),
111 __field(u64, pd_addr)
117 __entry->pd_addr = pd_addr;
122 __entry->pd_addr, __entry->ring, __entry->id)
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| H A D | radeon_vm.c | 238 uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); in radeon_vm_flush() local
241 if (pd_addr != vm_id->pd_gpu_addr || !vm_id->flushed_updates || in radeon_vm_flush()
244 trace_radeon_vm_flush(pd_addr, ring, vm->ids[ring].id); in radeon_vm_flush()
247 vm_id->pd_gpu_addr = pd_addr; in radeon_vm_flush()
641 uint64_t pd_addr = radeon_bo_gpu_offset(pd); in radeon_vm_update_page_directory() local
676 pde = pd_addr + pt_idx * 8; in radeon_vm_update_page_directory()
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| H A D | si_dma.c | 187 unsigned vm_id, uint64_t pd_addr) in si_dma_vm_flush() argument
196 radeon_ring_write(ring, pd_addr >> 12); in si_dma_vm_flush()
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| H A D | ni_dma.c | 449 unsigned vm_id, uint64_t pd_addr) in cayman_dma_vm_flush() argument
453 radeon_ring_write(ring, pd_addr >> 12); in cayman_dma_vm_flush()
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| H A D | cik_sdma.c | 945 unsigned vm_id, uint64_t pd_addr) in cik_dma_vm_flush() argument
956 radeon_ring_write(ring, pd_addr >> 12); in cik_dma_vm_flush()
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-pll.c | 110 val = readl(pll->pd_addr); in mtk_pll_set_rate_regs()
115 if (pll->pd_addr != pll->pcw_addr) { in mtk_pll_set_rate_regs()
116 writel(val, pll->pd_addr); in mtk_pll_set_rate_regs()
202 postdiv = (readl(pll->pd_addr) >> pll->data->pd_shift) & POSTDIV_MASK; in mtk_pll_recalc_rate()
337 pll->pd_addr = base + data->pd_reg; in mtk_clk_register_pll_ops()
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| H A D | clk-fhctl.c | 165 regval = readl(pll->pd_addr) >> pll->data->pd_shift; in __get_postdiv()
175 regval = readl(pll->pd_addr); in __set_postdiv()
178 writel(regval, pll->pd_addr); in __set_postdiv()
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| /linux/drivers/gpu/drm/i915/gt/ |
| H A D | gen6_ppgtt.h | 18 gen6_pte_t __iomem *pd_addr; member
|