Searched refs:nandc (Results 1 – 15 of 15) sorted by relevance
135 static u32 nandc_read(struct qcom_nand_controller *nandc, int offset) in nandc_read() argument137 return ioread32(nandc->base + offset); in nandc_read()140 static void nandc_write(struct qcom_nand_controller *nandc, int offset, in nandc_write() argument143 iowrite32(val, nandc->base + offset); in nandc_write()166 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); in nandc_set_read_loc_first() local175 nandc->regs->read_location0 = locreg_val; in nandc_set_read_loc_first()177 nandc->regs->read_location1 = locreg_val; in nandc_set_read_loc_first()179 nandc->regs->read_location2 = locreg_val; in nandc_set_read_loc_first()181 nandc->regs->read_location3 = locreg_val; in nandc_set_read_loc_first()198 struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip); in nandc_set_read_loc_last() local[all …]
123 &nandc {
184 &nandc {
362 nandc: nand-controller@1100d000 { label
522 nandc: nfi@1100d000 { label
336 compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
256 nandc: nand-controller@1 { label
411 nandc: nand-controller@1 { label
244 &nandc {
262 &nandc {
544 nandc: nand-controller@1100d000 { label
563 nandc: nand-controller@1100e000 { label
304 * The data pins are shared between nandc and emmc and
416 * The data pins are shared between nandc and emmc and
21561 F: Documentation/devicetree/bindings/mtd/qcom,nandc.yaml22145 F: Documentation/devicetree/bindings/mtd/renesas-nandc.yaml