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Searched refs:mmUVD_LMI_RBC_RB_64BIT_BAR_LOW (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_5_0_d.h38 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW 0x3c69 macro
H A Duvd_6_0_d.h49 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW 0x3c69 macro
H A Duvd_7_0_offset.h116 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW macro
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h242 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW macro
H A Dvcn_2_5_offset.h849 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW macro
H A Dvcn_2_0_0_offset.h960 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW macro
H A Dvcn_3_0_0_offset.h1263 #define mmUVD_LMI_RBC_RB_64BIT_BAR_LOW macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v2_0.c953 WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in vcn_v2_0_start_dpg_mode()
1113 WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in vcn_v2_0_start()
2011 mmUVD_LMI_RBC_RB_64BIT_BAR_LOW), in vcn_v2_0_start_sriov()
H A Duvd_v5_0.c438 WREG32(mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in uvd_v5_0_start()
H A Dvcn_v2_5.c989 WREG32_SOC15(VCN, inst_idx, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in vcn_v2_5_start_dpg_mode()
1169 WREG32_SOC15(VCN, i, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in vcn_v2_5_start()
1370 mmUVD_LMI_RBC_RB_64BIT_BAR_LOW), in vcn_v2_5_sriov_start()
H A Dvcn_v3_0.c1111 WREG32_SOC15(VCN, inst_idx, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in vcn_v3_0_start_dpg_mode()
1288 WREG32_SOC15(VCN, i, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in vcn_v3_0_start()
1456 mmUVD_LMI_RBC_RB_64BIT_BAR_LOW), in vcn_v3_0_start_sriov()
H A Dvcn_v1_0.c968 WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in vcn_v1_0_start_spg_mode()
1126 WREG32_SOC15(UVD, 0, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in vcn_v1_0_start_dpg_mode()
H A Duvd_v6_0.c853 WREG32(mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in uvd_v6_0_start()
H A Duvd_v7_0.c1101 WREG32_SOC15(UVD, k, mmUVD_LMI_RBC_RB_64BIT_BAR_LOW, in uvd_v7_0_start()