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Searched refs:misaligned (Results 1 – 25 of 30) sorted by relevance

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/linux/Documentation/filesystems/nfs/
H A Dnfsd-io-modes.rst115 But NFSD DIRECT does handle misaligned IO in terms of O_DIRECT as best
119 If NFSD_IO_DIRECT is used, expand any misaligned READ to the next
125 If NFSD_IO_DIRECT is used, split any misaligned WRITE into a start,
127 and the start and/or end are misaligned. Buffered IO is used for the
128 misaligned segments and O_DIRECT is used for the middle DIO-aligned
129 segment. DONTCACHE buffered IO is _not_ used for the misaligned
131 performance benefit when handling streaming misaligned WRITEs.
135 misaligned READ to the next DIO-aligned block (on either end of the
146 misaligned WRITE into a DIO-aligned middle segment.
/linux/drivers/dma/
H A Dpxa_dma.c90 bool misaligned; member
113 bool misaligned; member
449 static void phy_enable(struct pxad_phy *phy, bool misaligned) in phy_enable() argument
459 phy, phy->idx, misaligned); in phy_enable()
468 if (misaligned) in phy_enable()
511 phy_enable(chan->phy, chan->misaligned); in pxad_launch_chan()
570 to_pxad_sw_desc(vd)->misaligned) in pxad_try_hotchain()
651 chan->misaligned = in pxad_chan_handler()
808 if (chan->misaligned || !to_pxad_sw_desc(vd)->misaligned) in pxad_tx_submit()
817 chan->misaligned |= to_pxad_sw_desc(vd)->misaligned; in pxad_tx_submit()
[all …]
/linux/arch/alpha/lib/
H A Dev67-strlen.S29 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
H A Dev67-strcat.S35 ldq_u $1, 0($16) # L : load first quadword (a0 may be misaligned)
H A Dstrcat.S23 ldq_u $1, 0($16) # load first quadword (a0 may be misaligned)
H A Dstrlen.S25 ldq_u $1, 0($16) # load first quadword ($16 may be misaligned)
H A Dstrncat.S28 ldq_u $1, 0($16) # load first quadword ($16 may be misaligned)
H A Dev6-clear_user.S57 and $1, 7, $2 # .. .. E .. : number of misaligned bytes in tail
69 mskql $5, $16, $5 # .. U .. .. : take care of misaligned head
H A Dev67-strncat.S37 ldq_u $1, 0($16) # L : load first quadword ($16 may be misaligned)
H A Dev6-memcpy.S39 bne $1, $misaligned # U : Nope - gotta do this the slow way
181 $misaligned:
H A Dclear_user.S81 mskql $5, $16, $5 # e0 : take care of misaligned head
/linux/arch/nios2/kernel/
H A DMakefile26 obj-$(CONFIG_NIOS2_ALIGNMENT_TRAP) += misaligned.o
/linux/Documentation/arch/arm/
H A Dmem_alignment.rst5 Too many problems popped up because of unnoticed misaligned memory access in
16 alignment trap can fixup misaligned access for the exception cases, but at
/linux/Documentation/arch/riscv/
H A Dhwprobe.rst304 the performance of misaligned scalar native word accesses on the selected set
308 misaligned scalar accesses is unknown.
324 accesses are not supported at all and will generate a misaligned address
336 performance of misaligned vector accesses on the selected set of processors.
338 * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_UNKNOWN`: The performance of misaligned
341 * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_SLOW`: 32-bit misaligned accesses using vector
345 * :c:macro:`RISCV_HWPROBE_MISALIGNED_VECTOR_FAST`: 32-bit misaligned accesses using vector
349 not supported at all and will generate a misaligned address fault.
/linux/arch/m68k/ifpsp060/
H A DCHANGES86 bit 27 = 1 (misaligned bit)
108 bit 27 = 0 (misaligned bit)
H A Disp.doc46 cas (w/ a misaligned effective address)
174 The instructions "cas2" and "cas" (when used with a misaligned effective
/linux/scripts/coccinelle/misc/
H A Dcond_no_effect.cocci26 // /* misaligned */
/linux/drivers/gpu/drm/xe/
H A Dxe_guc_capture.c1048 int misaligned; in guc_capture_log_remove_bytes() local
1051 misaligned = avail % sizeof(u32); in guc_capture_log_remove_bytes()
1062 copy_size = avail < bytes_needed ? avail - misaligned : bytes_needed; in guc_capture_log_remove_bytes()
1069 if (misaligned) in guc_capture_log_remove_bytes()
/linux/Documentation/core-api/
H A Dprintk-index.rst50 <5> block/blk-settings.c:661 disk_stack_limits "%s: Warning: Device %s is misaligned\n"
/linux/arch/riscv/
H A DKconfig944 Embed support for detecting and emulating misaligned
952 Embed support for emulating misaligned loads and stores.
959 Enable detecting support for vector misaligned loads and stores.
966 Use SBI FWFT to request delegation of load address misaligned and
967 store address misaligned exceptions, if possible, and prefer Linux
/linux/arch/arm/kernel/
H A Dhead.S589 THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r0.
/linux/Documentation/sphinx/
H A Dkerneldoc-preamble.sty178 % For CJK ascii-art alignment (still misaligned for Hangul)
/linux/rust/zerocopy/src/
H A Dlayout.rs1578 let misaligned = (base + addr) % layout.align != 0; in test_validate_cast_and_convert_metadata() localVariable
1580 assert!(insufficient_bytes || misaligned); in test_validate_cast_and_convert_metadata()
/linux/Documentation/scsi/
H A DChangeLog.megaraid89 Root Cause: in uioc_t structure, one of member had misaligned and it
/linux/scripts/
H A Dspelling.txt1049 misalinged||misaligned

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