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Searched refs:mes (Results 1 – 24 of 24) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v12_0.c149 static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v12_0_submit_pkt_and_poll_completion() argument
155 struct amdgpu_device *adev = mes->adev; in mes_v12_0_submit_pkt_and_poll_completion()
156 struct amdgpu_ring *ring = &mes->ring[pipe]; in mes_v12_0_submit_pkt_and_poll_completion()
157 spinlock_t *ring_lock = &mes->ring_lock[pipe]; in mes_v12_0_submit_pkt_and_poll_completion()
303 static int mes_v12_0_add_hw_queue(struct amdgpu_mes *mes, in mes_v12_0_add_hw_queue() argument
306 struct amdgpu_device *adev = mes->adev; in mes_v12_0_add_hw_queue()
354 return mes_v12_0_submit_pkt_and_poll_completion(mes, in mes_v12_0_add_hw_queue()
360 static int mes_v12_0_remove_hw_queue(struct amdgpu_mes *mes, in mes_v12_0_remove_hw_queue() argument
364 uint32_t mes_rev = mes->sched_version & AMDGPU_MES_VERSION_MASK; in mes_v12_0_remove_hw_queue()
378 return mes_v12_0_submit_pkt_and_poll_completion(mes, in mes_v12_0_remove_hw_queue()
416 mes_v12_0_reset_queue_mmio(struct amdgpu_mes * mes,uint32_t queue_type,uint32_t me_id,uint32_t pipe_id,uint32_t queue_id,uint32_t vmid) mes_v12_0_reset_queue_mmio() argument
510 mes_v12_0_map_legacy_queue(struct amdgpu_mes * mes,struct mes_map_legacy_queue_input * input) mes_v12_0_map_legacy_queue() argument
541 mes_v12_0_unmap_legacy_queue(struct amdgpu_mes * mes,struct mes_unmap_legacy_queue_input * input) mes_v12_0_unmap_legacy_queue() argument
580 mes_v12_0_suspend_gang(struct amdgpu_mes * mes,struct mes_suspend_gang_input * input) mes_v12_0_suspend_gang() argument
601 mes_v12_0_resume_gang(struct amdgpu_mes * mes,struct mes_resume_gang_input * input) mes_v12_0_resume_gang() argument
620 mes_v12_0_query_sched_status(struct amdgpu_mes * mes,int pipe) mes_v12_0_query_sched_status() argument
635 mes_v12_0_misc_op(struct amdgpu_mes * mes,struct mes_misc_op_input * input) mes_v12_0_misc_op() argument
711 mes_v12_0_set_hw_resources_1(struct amdgpu_mes * mes,int pipe) mes_v12_0_set_hw_resources_1() argument
729 mes_v12_0_set_hw_resources(struct amdgpu_mes * mes,int pipe) mes_v12_0_set_hw_resources() argument
808 mes_v12_0_init_aggregated_doorbell(struct amdgpu_mes * mes) mes_v12_0_init_aggregated_doorbell() argument
864 mes_v12_0_enable_unmapped_doorbell_handling(struct amdgpu_mes * mes,bool enable) mes_v12_0_enable_unmapped_doorbell_handling() argument
883 mes_v12_0_reset_hw_queue(struct amdgpu_mes * mes,struct mes_reset_queue_input * input) mes_v12_0_reset_hw_queue() argument
926 mes_v12_0_detect_and_reset_hung_queues(struct amdgpu_mes * mes,struct mes_detect_and_reset_queue_input * input) mes_v12_0_detect_and_reset_hung_queues() argument
967 mes_v12_0_inv_tlbs_pasid(struct amdgpu_mes * mes,struct mes_inv_tlbs_pasid_input * input) mes_v12_0_inv_tlbs_pasid() argument
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H A Dmes_v11_0.c169 static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v11_0_submit_pkt_and_poll_completion()
175 struct amdgpu_device *adev = mes->adev; in mes_v11_0_submit_pkt_and_poll_completion()
176 struct amdgpu_ring *ring = &mes->ring[0]; in mes_v11_0_submit_pkt_and_poll_completion()
205 spin_lock_irqsave(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
235 spin_unlock_irqrestore(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
277 spin_unlock_irqrestore(&mes->ring_lock[0], flags); in mes_v11_0_submit_pkt_and_poll_completion()
314 static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes, in mes_v11_0_add_hw_queue()
317 struct amdgpu_device *adev = mes->adev; in mes_v11_0_add_hw_queue()
343 if (((adev->mes.sched_version & AMDGPU_MES_API_VERSION_MASK) >> in mes_v11_0_add_hw_queue()
367 return mes_v11_0_submit_pkt_and_poll_completion(mes, in mes_v11_0_add_hw_queue()
167 mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes * mes,void * pkt,int size,int api_status_off) mes_v11_0_submit_pkt_and_poll_completion() argument
312 mes_v11_0_add_hw_queue(struct amdgpu_mes * mes,struct mes_add_queue_input * input) mes_v11_0_add_hw_queue() argument
370 mes_v11_0_remove_hw_queue(struct amdgpu_mes * mes,struct mes_remove_queue_input * input) mes_v11_0_remove_hw_queue() argument
393 mes_v11_0_reset_queue_mmio(struct amdgpu_mes * mes,uint32_t queue_type,uint32_t me_id,uint32_t pipe_id,uint32_t queue_id,uint32_t vmid) mes_v11_0_reset_queue_mmio() argument
487 mes_v11_0_map_legacy_queue(struct amdgpu_mes * mes,struct mes_map_legacy_queue_input * input) mes_v11_0_map_legacy_queue() argument
512 mes_v11_0_unmap_legacy_queue(struct amdgpu_mes * mes,struct mes_unmap_legacy_queue_input * input) mes_v11_0_unmap_legacy_queue() argument
545 mes_v11_0_suspend_gang(struct amdgpu_mes * mes,struct mes_suspend_gang_input * input) mes_v11_0_suspend_gang() argument
566 mes_v11_0_resume_gang(struct amdgpu_mes * mes,struct mes_resume_gang_input * input) mes_v11_0_resume_gang() argument
585 mes_v11_0_query_sched_status(struct amdgpu_mes * mes) mes_v11_0_query_sched_status() argument
600 mes_v11_0_misc_op(struct amdgpu_mes * mes,struct mes_misc_op_input * input) mes_v11_0_misc_op() argument
674 mes_v11_0_set_hw_resources(struct amdgpu_mes * mes) mes_v11_0_set_hw_resources() argument
738 mes_v11_0_set_hw_resources_1(struct amdgpu_mes * mes) mes_v11_0_set_hw_resources_1() argument
760 mes_v11_0_reset_hw_queue(struct amdgpu_mes * mes,struct mes_reset_queue_input * input) mes_v11_0_reset_hw_queue() argument
797 mes_v11_0_detect_and_reset_hung_queues(struct amdgpu_mes * mes,struct mes_detect_and_reset_queue_input * input) mes_v11_0_detect_and_reset_hung_queues() argument
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H A Dmes_v12_1.c152 static int mes_v12_1_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, in mes_v12_1_submit_pkt_and_poll_completion()
158 struct amdgpu_device *adev = mes->adev; in mes_v12_1_submit_pkt_and_poll_completion()
159 struct amdgpu_ring *ring = &mes->ring[MES_PIPE_INST(xcc_id, pipe)]; in mes_v12_1_submit_pkt_and_poll_completion()
160 spinlock_t *ring_lock = &mes->ring_lock[MES_PIPE_INST(xcc_id, pipe)]; in mes_v12_1_submit_pkt_and_poll_completion()
286 static int mes_v12_1_add_hw_queue(struct amdgpu_mes *mes, in mes_v12_1_add_hw_queue()
293 if (mes->enable_coop_mode) in mes_v12_1_add_hw_queue()
294 xcc_id = mes->master_xcc_ids[inst]; in mes_v12_1_add_hw_queue()
341 return mes_v12_1_submit_pkt_and_poll_completion(mes, in mes_v12_1_add_hw_queue()
347 static int mes_v12_1_remove_hw_queue(struct amdgpu_mes *mes, in mes_v12_1_remove_hw_queue()
354 if (mes in mes_v12_1_remove_hw_queue()
149 mes_v12_1_submit_pkt_and_poll_completion(struct amdgpu_mes * mes,int xcc_id,int pipe,void * pkt,int size,int api_status_off) mes_v12_1_submit_pkt_and_poll_completion() argument
283 mes_v12_1_add_hw_queue(struct amdgpu_mes * mes,struct mes_add_queue_input * input) mes_v12_1_add_hw_queue() argument
344 mes_v12_1_remove_hw_queue(struct amdgpu_mes * mes,struct mes_remove_queue_input * input) mes_v12_1_remove_hw_queue() argument
369 mes_v12_1_reset_hw_queue(struct amdgpu_mes * mes,struct mes_reset_queue_input * input) mes_v12_1_reset_hw_queue() argument
396 mes_v12_1_map_legacy_queue(struct amdgpu_mes * mes,struct mes_map_legacy_queue_input * input) mes_v12_1_map_legacy_queue() argument
428 mes_v12_1_unmap_legacy_queue(struct amdgpu_mes * mes,struct mes_unmap_legacy_queue_input * input) mes_v12_1_unmap_legacy_queue() argument
468 mes_v12_1_suspend_gang(struct amdgpu_mes * mes,struct mes_suspend_gang_input * input) mes_v12_1_suspend_gang() argument
474 mes_v12_1_resume_gang(struct amdgpu_mes * mes,struct mes_resume_gang_input * input) mes_v12_1_resume_gang() argument
480 mes_v12_1_query_sched_status(struct amdgpu_mes * mes,int pipe,int xcc_id) mes_v12_1_query_sched_status() argument
519 mes_v12_1_misc_op(struct amdgpu_mes * mes,struct mes_misc_op_input * input) mes_v12_1_misc_op() argument
611 mes_v12_1_set_hw_resources_1(struct amdgpu_mes * mes,int pipe,int xcc_id) mes_v12_1_set_hw_resources_1() argument
647 mes_v12_1_set_hw_resources(struct amdgpu_mes * mes,int pipe,int xcc_id) mes_v12_1_set_hw_resources() argument
723 mes_v12_1_init_aggregated_doorbell(struct amdgpu_mes * mes,int xcc_id) mes_v12_1_init_aggregated_doorbell() argument
780 mes_v12_1_enable_unmapped_doorbell_handling(struct amdgpu_mes * mes,bool enable,int xcc_id) mes_v12_1_enable_unmapped_doorbell_handling() argument
856 mes_v12_1_inv_tlbs_pasid(struct amdgpu_mes * mes,struct mes_inv_tlbs_pasid_input * input) mes_v12_1_inv_tlbs_pasid() argument
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H A Dmes_userqueue.c150 amdgpu_mes_lock(&adev->mes); in mes_userq_map()
151 r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input); in mes_userq_map()
152 amdgpu_mes_unlock(&adev->mes); in mes_userq_map()
174 amdgpu_mes_lock(&adev->mes); in mes_userq_unmap()
175 r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input); in mes_userq_unmap()
176 amdgpu_mes_unlock(&adev->mes); in mes_userq_unmap()
230 amdgpu_mes_lock(&adev->mes); in mes_userq_detect_and_reset()
233 amdgpu_mes_unlock(&adev->mes); in mes_userq_detect_and_reset()
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H A Dgmc_v12_0.c317 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && in gmc_v12_0_flush_gpu_tlb()
352 if (adev->enable_uni_mes && adev->mes.ring[AMDGPU_MES_SCHED_PIPE].sched.ready && in gmc_v12_0_flush_gpu_tlb_pasid()
353 (adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x84) { in gmc_v12_0_flush_gpu_tlb_pasid()
359 adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input); in gmc_v12_0_flush_gpu_tlb_pasid()
363 adev->mes.funcs->invalidate_tlbs_pasid(&adev->mes, &input); in gmc_v12_0_flush_gpu_tlb_pasid()
H A Damdgpu_dev_coredump.c183 version = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; in amdgpu_devcoredump_fw_info()
184 feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) >> in amdgpu_devcoredump_fw_info()
189 version = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in amdgpu_devcoredump_fw_info()
190 feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) >> in amdgpu_devcoredump_fw_info()
H A Damdgpu_kms.c354 fw_info->ver = adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
355 fw_info->feature = (adev->mes.kiq_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
359 fw_info->ver = adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in amdgpu_firmware_info()
360 fw_info->feature = (adev->mes.sched_version & AMDGPU_MES_FEAT_VERSION_MASK) in amdgpu_firmware_info()
457 num_slots += hweight32(adev->mes.gfx_hqd_mask[i]); in amdgpu_hw_ip_info()
472 num_slots += hweight32(adev->mes.compute_hqd_mask[i]); in amdgpu_hw_ip_info()
487 num_slots += hweight32(adev->mes.sdma_hqd_mask[i]); in amdgpu_hw_ip_info()
H A Damdgpu_gfx.c718 if (adev->mes.enable_legacy_queue_map) in amdgpu_gfx_enable_kcq()
786 if (adev->mes.enable_legacy_queue_map) { in amdgpu_gfx_enable_kgq()
1142 if (adev->mes.ring[0].sched.ready) in amdgpu_kiq_rreg()
1218 if (adev->mes.ring[0].sched.ready) { in amdgpu_kiq_wreg()
1316 if (adev->enable_mes_kiq && adev->mes.ring[0].sched.ready) in amdgpu_kiq_hdp_flush()
H A Damdgpu_gmc.c666 /* reserve engine 6 for uni mes */ in amdgpu_gmc_allocate_vm_inv_eng()
678 if (ring == &adev->mes.ring[0] || in amdgpu_gmc_allocate_vm_inv_eng()
679 ring == &adev->mes.ring[1] || in amdgpu_gmc_allocate_vm_inv_eng()
888 if (adev->mes.ring[MES_PIPE_INST(xcc_inst, 0)].sched.ready) { in amdgpu_gmc_fw_reg_write_reg_wait()
H A Damdgpu_amdkfd.c734 ((adev->mes.kiq_version & AMDGPU_MES_VERSION_MASK) <= 64)) || in amdgpu_amdkfd_set_compute_idle()
H A Dgmc_v11_0.c246 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && in gmc_v11_0_flush_gpu_tlb()
H A Dgfx_v11_0.c1497 adev->mes.fw[pipe]->data; in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
1499 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
1506 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v11_0_rlc_backdoor_autoload_copy_mes_ucode()
1640 adev->mes.fw_version[0] >= 120) { in gfx_v11_0_sw_init()
1670 adev->mes.fw_version[0] >= 99) { in gfx_v11_0_sw_init()
1685 adev->mes.fw_version[0] >= 128) { in gfx_v11_0_sw_init()
1699 adev->mes.fw_version[0] >= 114) { in gfx_v11_0_sw_init()
4672 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) in gfx_v11_0_cp_resume()
H A Dgfx_v12_0.c1301 adev->mes.fw[pipe]->data; in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1303 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1309 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_0_rlc_backdoor_autoload_copy_mes_ucode()
1440 adev->mes.fw_version[0] >= 123) { in gfx_v12_0_sw_init()
1455 adev->mes.fw_version[0] >= 100) in gfx_v12_0_sw_init()
3522 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) in gfx_v12_0_cp_resume()
H A Dgfx_v12_1.c1088 adev->mes.fw[pipe]->data;
1090 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_1_rlc_backdoor_autoload_enable()
1096 fw_data = (const __le32 *)(adev->mes.fw[pipe]->data + in gfx_v12_1_rlc_backdoor_autoload_enable()
2550 if (adev->enable_mes_kiq && adev->mes.kiq_hw_init) in gfx_v12_1_cp_resume()
H A Damdgpu.h1004 /* mes */
1008 struct amdgpu_mes mes;
1044 struct amdgpu_mes mes; global() member
/linux/tools/testing/cxl/test/
H A Dmem.c179 struct mock_event_store mes; member
194 return &mdata->mes.mock_logs[log_type]; in event_find_log()
228 static void mes_add_event(struct mock_event_store *mes, in mes_add_event() argument
237 log = &mes->mock_logs[log_type]; in mes_add_event()
365 struct mock_event_store *mes = &mdata->mes; in cxl_mock_event_trigger()
376 cxl_mem_get_event_records(mdata->mds, mes->ev_status);
517 static void cxl_mock_add_event_logs(struct mock_event_store *mes) in cxl_mock_add_event_logs()
531 mes_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed); in cxl_mock_add_event_logs()
532 mes_add_event(mes, CXL_EVENT_TYPE_INF in cxl_mock_add_event_logs()
360 struct mock_event_store *mes = &mdata->mes; cxl_mock_event_trigger() local
512 cxl_mock_add_event_logs(struct mock_event_store * mes) cxl_mock_add_event_logs() argument
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/linux/tools/power/cpupower/utils/idle_monitor/
H A Dcpupower-monitor.h71 #define print_overflow_err(mes, ov) \ argument
75 "could be inaccurate\n"), mes, ov); \
/linux/drivers/misc/sgi-gru/
H A Dgrukservices.c998 char mes[GRU_CACHE_LINE_BYTES], *m; in quicktest1() local
1005 memset(mes, 0xee, sizeof(mes)); in quicktest1()
1009 mes[8] = i; in quicktest1()
1011 ret = gru_send_message_gpa(&mqd, mes, sizeof(mes)); in quicktest1()
/linux/drivers/net/arcnet/
H A Dcapmode.c178 ((unsigned char *)&pkt->soft.cap.mes), length - 1); in prepare_tx()
213 ackpkt->soft.cap.mes.ack = acked; in ack_tx()
/linux/include/uapi/linux/
H A Dif_arcnet.h94 } mes; member
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_debug.h138 (dev->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 70) || in kfd_dbg_has_ttmps_always_setup()
H A Dkfd_device_queue_manager.c268 amdgpu_mes_lock(&adev->mes); in add_queue_mes()
269 r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input); in add_queue_mes()
270 amdgpu_mes_unlock(&adev->mes); in add_queue_mes()
306 amdgpu_mes_lock(&adev->mes); in remove_queue_mes()
307 r = adev->mes.funcs->remove_hw_queue(&adev->mes, &queue_input);
308 amdgpu_mes_unlock(&adev->mes); in remove_all_kfd_queues_mes()
413 int hqd_info_size = adev->mes.hung_queue_hqd_info_offset; in increment_queue_count()
1973 int hqd_info_size = adev->mes in destroy_kernel_queue_cpsch()
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H A Dkfd_topology.c1932 uint32_t mes_api_rev = (dev->gpu->adev->mes.sched_version & in kfd_topology_set_dbg_firmware_support()
1935 uint32_t mes_rev = dev->gpu->adev->mes.sched_version & in kfd_topology_set_dbg_firmware_support()
H A Dkfd_device.c571 uint32_t mes_rev = node->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK; in kfd_gws_init()