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/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi_security.c489 u32 pb_addr, mask; in gaudi_init_mme_protection_bits() local
515 mask = 1U << ((mmMME0_CTRL_RESET & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
516 mask |= 1U << ((mmMME0_CTRL_QM_STALL & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
517 mask |= 1U << ((mmMME0_CTRL_SYNC_OBJECT_FIFO_TH & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
518 mask |= 1U << ((mmMME0_CTRL_EUS_ROLLUP_CNT_ADD & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
519 mask |= 1U << ((mmMME0_CTRL_INTR_CAUSE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
520 mask |= 1U << ((mmMME0_CTRL_INTR_MASK & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
521 mask |= 1U << ((mmMME0_CTRL_LOG_SHADOW & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
522 mask |= 1U << ((mmMME0_CTRL_PCU_RL_DESC0 & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
523 mask |= 1U << ((mmMME0_CTRL_PCU_RL_TOKEN_UPDATE & 0x7F) >> 2); in gaudi_init_mme_protection_bits()
[all …]
/linux/drivers/accel/habanalabs/goya/
H A Dgoya_security.c30 u32 pb_addr, mask; in goya_init_mme_protection_bits() local
69 mask = 1 << ((mmMME_DUMMY & 0x7F) >> 2); in goya_init_mme_protection_bits()
70 mask |= 1 << ((mmMME_RESET & 0x7F) >> 2); in goya_init_mme_protection_bits()
71 mask |= 1 << ((mmMME_STALL & 0x7F) >> 2); in goya_init_mme_protection_bits()
72 mask |= 1 << ((mmMME_SM_BASE_ADDRESS_LOW & 0x7F) >> 2); in goya_init_mme_protection_bits()
73 mask |= 1 << ((mmMME_SM_BASE_ADDRESS_HIGH & 0x7F) >> 2); in goya_init_mme_protection_bits()
74 mask |= 1 << ((mmMME_DBGMEM_ADD & 0x7F) >> 2); in goya_init_mme_protection_bits()
75 mask |= 1 << ((mmMME_DBGMEM_DATA_WR & 0x7F) >> 2); in goya_init_mme_protection_bits()
76 mask |= 1 << ((mmMME_DBGMEM_DATA_RD & 0x7F) >> 2); in goya_init_mme_protection_bits()
77 mask |= 1 << ((mmMME_DBGMEM_CTRL & 0x7F) >> 2); in goya_init_mme_protection_bits()
[all …]
/linux/drivers/video/fbdev/riva/
H A Dnvreg.h31 #define MASKEXPAND(mask) BITMASK(1?mask,0?mask) argument
34 #define SetBF(mask,value) ((value) << (0?mask)) argument
35 #define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) ) argument
37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ argument
38 | SetBF(mask,value)))
51 #define DEVICE_DEF(device,mask,value) \ argument
52 SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) argument
54 #define DEVICE_MASK(device,mask) MASKEXPAND(NV_##device##_##mask) argument
59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument
[all …]
/linux/arch/s390/kernel/
H A Dfpu.c18 int mask; in __kernel_fpu_begin() local
24 flags &= state->hdr.mask; in __kernel_fpu_begin()
32 mask = flags & KERNEL_VXR; in __kernel_fpu_begin()
33 if (mask == KERNEL_VXR) { in __kernel_fpu_begin()
38 if (mask == KERNEL_VXR_MID) { in __kernel_fpu_begin()
42 mask = flags & KERNEL_VXR_LOW; in __kernel_fpu_begin()
43 if (mask) { in __kernel_fpu_begin()
44 if (mask == KERNEL_VXR_LOW) in __kernel_fpu_begin()
46 else if (mask == KERNEL_VXR_V0V7) in __kernel_fpu_begin()
51 mask = flags & KERNEL_VXR_HIGH; in __kernel_fpu_begin()
[all …]
/linux/include/sound/
H A Dpcm_params.h26 static inline void snd_mask_none(struct snd_mask *mask) in snd_mask_none() argument
28 memset(mask, 0, sizeof(*mask)); in snd_mask_none()
31 static inline void snd_mask_any(struct snd_mask *mask) in snd_mask_any() argument
33 memset(mask, 0xff, SNDRV_MASK_SIZE * sizeof(u_int32_t)); in snd_mask_any()
36 static inline int snd_mask_empty(const struct snd_mask *mask) in snd_mask_empty() argument
40 if (mask->bits[i]) in snd_mask_empty()
45 static inline unsigned int snd_mask_min(const struct snd_mask *mask) in snd_mask_min() argument
49 if (mask->bits[i]) in snd_mask_min()
50 return __ffs(mask->bits[i]) + (i << 5); in snd_mask_min()
55 static inline unsigned int snd_mask_max(const struct snd_mask *mask) in snd_mask_max() argument
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_tc_u32_parse.h41 int (*val)(struct ch_filter_specification *f, __be32 val, __be32 mask);
46 __be32 val, __be32 mask) in cxgb4_fill_ipv4_tos() argument
49 f->mask.tos = (ntohl(mask) >> 16) & 0x000000FF; in cxgb4_fill_ipv4_tos()
55 __be32 val, __be32 mask) in cxgb4_fill_ipv4_frag() argument
61 mask_val = ntohl(mask) & 0x0000FFFF; in cxgb4_fill_ipv4_frag()
65 f->mask.frag = 1; in cxgb4_fill_ipv4_frag()
68 f->mask.frag = 1; in cxgb4_fill_ipv4_frag()
77 __be32 val, __be32 mask) in cxgb4_fill_ipv4_proto() argument
80 f->mask.proto = (ntohl(mask) >> 16) & 0x000000FF; in cxgb4_fill_ipv4_proto()
86 __be32 val, __be32 mask) in cxgb4_fill_ipv4_src_ip() argument
[all …]
/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/sws/
H A Ddr_matcher.c116 dr_mask_is_tnl_vxlan_gpe(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_vxlan_gpe() argument
119 return dr_mask_is_vxlan_gpe_set(&mask->misc3) && in dr_mask_is_tnl_vxlan_gpe()
157 dr_mask_is_tnl_geneve(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_geneve() argument
160 return dr_mask_is_tnl_geneve_set(&mask->misc) && in dr_mask_is_tnl_geneve()
174 static bool dr_mask_is_tnl_gtpu(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu() argument
177 return dr_mask_is_tnl_gtpu_set(&mask->misc3) && in dr_mask_is_tnl_gtpu()
186 static bool dr_mask_is_tnl_gtpu_dw_0(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_dw_0() argument
189 return mask->misc3.gtpu_dw_0 && in dr_mask_is_tnl_gtpu_dw_0()
198 static bool dr_mask_is_tnl_gtpu_teid(struct mlx5dr_match_param *mask, in dr_mask_is_tnl_gtpu_teid() argument
201 return mask->misc3.gtpu_teid && in dr_mask_is_tnl_gtpu_teid()
[all …]
/linux/drivers/mfd/
H A Dwm8350-irq.c37 int mask; member
45 .mask = WM8350_OC_LS_EINT,
51 .mask = WM8350_UV_DC1_EINT,
56 .mask = WM8350_UV_DC2_EINT,
61 .mask = WM8350_UV_DC3_EINT,
66 .mask = WM8350_UV_DC4_EINT,
71 .mask = WM8350_UV_DC5_EINT,
76 .mask = WM8350_UV_DC6_EINT,
81 .mask = WM8350_UV_LDO1_EINT,
86 .mask = WM8350_UV_LDO2_EINT,
[all …]
H A Dda9052-irq.c38 .mask = DA9052_IRQ_MASK_POS_1,
42 .mask = DA9052_IRQ_MASK_POS_2,
46 .mask = DA9052_IRQ_MASK_POS_3,
50 .mask = DA9052_IRQ_MASK_POS_4,
54 .mask = DA9052_IRQ_MASK_POS_5,
58 .mask = DA9052_IRQ_MASK_POS_6,
62 .mask = DA9052_IRQ_MASK_POS_7,
66 .mask = DA9052_IRQ_MASK_POS_8,
70 .mask = DA9052_IRQ_MASK_POS_1,
74 .mask = DA9052_IRQ_MASK_POS_2,
[all …]
H A Dwm5110-tables.c285 .mask = ARIZONA_MICD_CLAMP_FALL_EINT1
288 .mask = ARIZONA_MICD_CLAMP_RISE_EINT1
290 [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 },
291 [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 },
292 [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 },
293 [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 },
310 [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 },
311 [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 },
312 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
313 [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
[all …]
/linux/drivers/platform/mellanox/
H A Dmlx-platform.c435 .mask = MLXPLAT_CPLD_I2C_CAP_MASK,
450 .mask = MLXPLAT_CPLD_AGGR_MASK_COMEX,
705 .mask = BIT(0),
711 .mask = BIT(1),
721 .mask = BIT(0),
727 .mask = BIT(1),
737 .mask = BIT(0),
746 .mask = BIT(0),
753 .mask = BIT(1),
763 .mask = BIT(0),
[all …]
/linux/fs/xfs/
H A Dxfs_health.c109 unsigned int mask) in xfs_fs_mark_sick() argument
113 ASSERT(!(mask & ~XFS_SICK_FS_ALL)); in xfs_fs_mark_sick()
114 trace_xfs_fs_mark_sick(mp, mask); in xfs_fs_mark_sick()
118 mp->m_fs_sick |= mask; in xfs_fs_mark_sick()
122 if (mask) in xfs_fs_mark_sick()
123 xfs_healthmon_report_fs(mp, XFS_HEALTHMON_SICK, old_mask, mask); in xfs_fs_mark_sick()
130 unsigned int mask) in xfs_fs_mark_corrupt() argument
134 ASSERT(!(mask & ~XFS_SICK_FS_ALL)); in xfs_fs_mark_corrupt()
135 trace_xfs_fs_mark_corrupt(mp, mask); in xfs_fs_mark_corrupt()
139 mp->m_fs_sick |= mask; in xfs_fs_mark_corrupt()
[all …]
/linux/include/asm-generic/
H A Dword-at-a-time.h20 unsigned long mask = (val & c->low_bits) + c->low_bits; in prep_zero_mask() local
21 return ~(mask | rhs); in prep_zero_mask()
24 #define create_zero_mask(mask) (mask) argument
26 static inline long find_zero(unsigned long mask) in find_zero() argument
30 if (mask >> 32) in find_zero()
31 mask >>= 32; in find_zero()
35 if (mask >> 16) in find_zero()
36 mask >>= 16; in find_zero()
39 return (mask >> 8) ? byte : byte + 1; in find_zero()
50 #define zero_bytemask(mask) (~1ul << __fls(mask)) argument
[all …]
/linux/arch/powerpc/sysdev/
H A Dfsl_rcpm.c30 unsigned int mask = 1 << hw_cpu; in rcpm_v1_irq_mask() local
32 setbits32(&rcpm_v1_regs->cpmimr, mask); in rcpm_v1_irq_mask()
33 setbits32(&rcpm_v1_regs->cpmcimr, mask); in rcpm_v1_irq_mask()
34 setbits32(&rcpm_v1_regs->cpmmcmr, mask); in rcpm_v1_irq_mask()
35 setbits32(&rcpm_v1_regs->cpmnmimr, mask); in rcpm_v1_irq_mask()
41 unsigned int mask = 1 << hw_cpu; in rcpm_v2_irq_mask() local
43 setbits32(&rcpm_v2_regs->tpmimr0, mask); in rcpm_v2_irq_mask()
44 setbits32(&rcpm_v2_regs->tpmcimr0, mask); in rcpm_v2_irq_mask()
45 setbits32(&rcpm_v2_regs->tpmmcmr0, mask); in rcpm_v2_irq_mask()
46 setbits32(&rcpm_v2_regs->tpmnmimr0, mask); in rcpm_v2_irq_mask()
[all …]
H A Dipic.c35 .mask = IPIC_SIMSR_H,
42 .mask = IPIC_SIMSR_H,
49 .mask = IPIC_SIMSR_H,
56 .mask = IPIC_SIMSR_H,
63 .mask = IPIC_SIMSR_H,
70 .mask = IPIC_SIMSR_H,
77 .mask = IPIC_SIMSR_H,
84 .mask = IPIC_SIMSR_H,
91 .mask = IPIC_SIMSR_H,
98 .mask = IPIC_SIMSR_H,
[all …]
/linux/drivers/video/fbdev/
H A Dc2p_core.h23 unsigned int shift, u32 mask) in _transp() argument
25 u32 t = (d[i1] ^ (d[i2] >> shift)) & mask; in _transp()
62 u32 mask = get_mask(n); in transp8() local
67 _transp(d, 0, 1, n, mask); in transp8()
69 _transp(d, 2, 3, n, mask); in transp8()
71 _transp(d, 4, 5, n, mask); in transp8()
73 _transp(d, 6, 7, n, mask); in transp8()
78 _transp(d, 0, 2, n, mask); in transp8()
79 _transp(d, 1, 3, n, mask); in transp8()
81 _transp(d, 4, 6, n, mask); in transp8()
[all …]
/linux/drivers/iio/accel/
H A Dst_accel_core.c128 .mask = 0xf0,
142 .mask = 0xf0,
147 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
151 .mask = 0x30,
177 .mask = 0x80,
182 .mask = 0x10,
188 .mask = 0x07,
210 .mask = 0x18,
220 .mask = 0xe0,
226 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
[all …]
/linux/arch/sparc/include/asm/
H A Dbitops_32.h22 unsigned long sp32___set_bit(unsigned long *addr, unsigned long mask);
23 unsigned long sp32___clear_bit(unsigned long *addr, unsigned long mask);
24 unsigned long sp32___change_bit(unsigned long *addr, unsigned long mask);
34 unsigned long *ADDR, mask; in test_and_set_bit() local
37 mask = 1 << (nr & 31); in test_and_set_bit()
39 return sp32___set_bit(ADDR, mask) != 0; in test_and_set_bit()
44 unsigned long *ADDR, mask; in set_bit() local
47 mask = 1 << (nr & 31); in set_bit()
49 (void) sp32___set_bit(ADDR, mask); in set_bit()
54 unsigned long *ADDR, mask; in test_and_clear_bit() local
[all …]
/linux/drivers/iio/imu/st_lsm6dsx/
H A Dst_lsm6dsx_core.c160 .mask = BIT(0),
164 .mask = BIT(7),
168 .mask = BIT(6),
195 .mask = GENMASK(7, 5),
208 .mask = GENMASK(7, 5),
223 .mask = GENMASK(4, 3),
234 .mask = GENMASK(4, 3),
246 .mask = BIT(3),
250 .mask = BIT(3),
254 .mask = BIT(5),
[all …]
/linux/kernel/bpf/
H A Dtnum.c13 #define TNUM(_v, _m) (struct tnum){.value = _v, .mask = _m}
15 const struct tnum tnum_unknown = { .value = 0, .mask = -1 };
40 return TNUM(a.value << shift, a.mask << shift); in tnum_lshift()
45 return TNUM(a.value >> shift, a.mask >> shift); in tnum_rshift()
57 (u32)(((s32)a.mask) >> min_shift)); in tnum_arshift()
60 (s64)a.mask >> min_shift); in tnum_arshift()
67 sm = a.mask + b.mask; in tnum_add()
71 mu = chi | a.mask | b.mask; in tnum_add()
80 alpha = dv + a.mask; in tnum_sub()
81 beta = dv - b.mask; in tnum_sub()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce60/
H A Dhw_translate_dce60.c48 uint32_t mask = 1; in index_from_vector() local
51 if (vector == mask) in index_from_vector()
55 mask <<= 1; in index_from_vector()
56 } while (mask); in index_from_vector()
65 uint32_t mask, in offset_to_id() argument
73 switch (mask) { in offset_to_id()
103 switch (mask) { in offset_to_id()
130 switch (mask) { in offset_to_id()
145 switch (mask) { in offset_to_id()
166 *en = index_from_vector(mask); in offset_to_id()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/gpio/dce80/
H A Dhw_translate_dce80.c48 uint32_t mask = 1; in index_from_vector() local
51 if (vector == mask) in index_from_vector()
55 mask <<= 1; in index_from_vector()
56 } while (mask); in index_from_vector()
65 uint32_t mask, in offset_to_id() argument
73 switch (mask) { in offset_to_id()
103 switch (mask) { in offset_to_id()
130 switch (mask) { in offset_to_id()
145 switch (mask) { in offset_to_id()
166 *en = index_from_vector(mask); in offset_to_id()
[all …]
/linux/drivers/input/joystick/
H A Danalog.c93 int mask; member
102 unsigned char mask; member
124 if (analog->mask & ANALOG_HAT_FCS) in analog_decode()
132 if (analog->mask & (0x10 << i)) in analog_decode()
135 if (analog->mask & ANALOG_HBTN_CHF) in analog_decode()
139 if (analog->mask & ANALOG_BTN_TL) in analog_decode()
141 if (analog->mask & ANALOG_BTN_TR) in analog_decode()
143 if (analog->mask & ANALOG_BTN_TL2) in analog_decode()
145 if (analog->mask & ANALOG_BTN_TR2) in analog_decode()
149 if (analog->mask & (1 << i)) in analog_decode()
[all …]
/linux/arch/mips/lib/
H A Dbitops.c25 unsigned long mask; in __mips_set_bit() local
28 mask = 1UL << bit; in __mips_set_bit()
30 *a |= mask; in __mips_set_bit()
46 unsigned long mask; in __mips_clear_bit() local
49 mask = 1UL << bit; in __mips_clear_bit()
51 *a &= ~mask; in __mips_clear_bit()
67 unsigned long mask; in __mips_change_bit() local
70 mask = 1UL << bit; in __mips_change_bit()
72 *a ^= mask; in __mips_change_bit()
89 unsigned long mask; in __mips_test_and_set_bit_lock() local
[all …]
/linux/net/sched/
H A Dcls_flower.c111 struct fl_flow_key mask; member
126 struct fl_flow_mask *mask; member
155 static unsigned short int fl_mask_range(const struct fl_flow_mask *mask) in fl_mask_range() argument
157 return mask->range.end - mask->range.start; in fl_mask_range()
160 static void fl_mask_update_range(struct fl_flow_mask *mask) in fl_mask_update_range() argument
162 const u8 *bytes = (const u8 *) &mask->key; in fl_mask_update_range()
163 size_t size = sizeof(mask->key); in fl_mask_update_range()
179 mask->range.start = rounddown(first, sizeof(long)); in fl_mask_update_range()
180 mask->range.end = roundup(last + 1, sizeof(long)); in fl_mask_update_range()
184 const struct fl_flow_mask *mask) in fl_key_get_start() argument
[all …]

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