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Searched refs:lane_width (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dhwmgr_ppt.h97 uint8_t lane_width; member
H A Dvega20_hwmgr.c3366 uint32_t gen_speed, lane_width, current_gen_speed, current_lane_width; in vega20_emit_clock_levels() local
3480 lane_width = pptable->PcieLaneCount[i]; in vega20_emit_clock_levels()
3489 (lane_width == 1) ? "x1" : in vega20_emit_clock_levels()
3490 (lane_width == 2) ? "x2" : in vega20_emit_clock_levels()
3491 (lane_width == 3) ? "x4" : in vega20_emit_clock_levels()
3492 (lane_width == 4) ? "x8" : in vega20_emit_clock_levels()
3493 (lane_width == 5) ? "x12" : in vega20_emit_clock_levels()
3494 (lane_width == 6) ? "x16" : in vega20_emit_clock_levels()
3499 lane_width) ? in vega20_emit_clock_levels()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_7_ppt.c1222 uint32_t gen_speed, lane_width; in smu_v13_0_7_emit_clk_levels() local
1264 &lane_width); in smu_v13_0_7_emit_clk_levels()
1271 SMU_DPM_PCIE_WIDTH_IDX(lane_width), in smu_v13_0_7_emit_clk_levels()
H A Dsmu_v13_0_0_ppt.c1212 uint32_t gen_speed, lane_width; in smu_v13_0_0_emit_clk_levels() local
1254 &lane_width); in smu_v13_0_0_emit_clk_levels()
1261 SMU_DPM_PCIE_WIDTH_IDX(lane_width), in smu_v13_0_0_emit_clk_levels()
/linux/drivers/gpu/drm/radeon/
H A Dsi_dpm.c4644 u32 lane_width; in si_init_smc_table() local
4715 lane_width = radeon_get_pcie_lanes(rdev); in si_init_smc_table()
4716 si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_init_smc_table()
5861 u32 lane_width; in si_set_pcie_lane_width_in_smc() local
5869 lane_width = radeon_get_pcie_lanes(rdev); in si_set_pcie_lane_width_in_smc()
5870 si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_set_pcie_lane_width_in_smc()
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c5248 u32 lane_width; in si_init_smc_table() local
5319 lane_width = amdgpu_get_pcie_lanes(adev); in si_init_smc_table()
5320 si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_init_smc_table()
6449 u32 lane_width; in si_set_pcie_lane_width_in_smc() local
6457 lane_width = amdgpu_get_pcie_lanes(adev); in si_set_pcie_lane_width_in_smc()
6458 si_write_smc_soft_register(adev, SI_SMC_SOFT_REGISTER_non_ulv_pcie_link_width, lane_width); in si_set_pcie_lane_width_in_smc()