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Searched refs:input_clk (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dsnps,hsdk-pll-clock.txt17 input_clk: input-clk {
27 clocks = <&input_clk>;
/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_led.c60 u32 input_clk = 27e6; /* PDISPLAY.SOR[1].PWM is connected to the crystal */ in nouveau_led_set_brightness() local
64 div = input_clk / freq; in nouveau_led_set_brightness()
/linux/arch/arc/boot/dts/
H A Dhsdk.dts62 input_clk: input-clk { label
127 clocks = <&input_clk>;
273 clocks = <&input_clk>;
H A Daxc003.dtsi24 input_clk: input-clk { label
34 clocks = <&input_clk>;
H A Daxc003_idu.dtsi24 input_clk: input-clk { label
34 clocks = <&input_clk>;
H A Daxc001.dtsi31 input_clk: input-clk { label
H A Daxs10x_mb.dtsi70 clocks = <&input_clk>;
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c2961 int32_t input_clk, input_vol, i; in vega20_odn_edit_dpm_table() local
2985 input_clk = input[i + 1]; in vega20_odn_edit_dpm_table()
2993 if (input_clk < od8_settings[OD8_SETTING_GFXCLK_FMIN].min_value || in vega20_odn_edit_dpm_table()
2994 input_clk > od8_settings[OD8_SETTING_GFXCLK_FMAX].max_value) { in vega20_odn_edit_dpm_table()
2996 input_clk, in vega20_odn_edit_dpm_table()
3002 if ((input_index == 0 && od_table->GfxclkFmin != input_clk) || in vega20_odn_edit_dpm_table()
3003 (input_index == 1 && od_table->GfxclkFmax != input_clk)) in vega20_odn_edit_dpm_table()
3007 od_table->GfxclkFmin = input_clk; in vega20_odn_edit_dpm_table()
3009 od_table->GfxclkFmax = input_clk; in vega20_odn_edit_dpm_table()
3028 input_clk = input[i + 1]; in vega20_odn_edit_dpm_table()
[all …]
/linux/drivers/clk/
H A Dclk-si5341.c75 struct clk *input_clk[SI5341_NUM_INPUTS]; member
1421 m_den = clk_get_rate(data->input_clk[sel]) / 10; in si5341_initialize_pll()
1440 if (!data->input_clk[res]) { in si5341_clk_select_active_input()
1445 if (data->input_clk[i]) { in si5341_clk_select_active_input()
1462 err = clk_prepare_enable(data->input_clk[res]); in si5341_clk_select_active_input()
1588 data->input_clk[i] = input; in si5341_probe()
/linux/drivers/media/i2c/
H A Dov5670.c2647 u32 input_clk = 0; in ov5670_probe() local
2662 input_clk = clk_get_rate(ov5670->xvclk); in ov5670_probe()
2663 if (input_clk != OV5670_XVCLK_FREQ) { in ov5670_probe()
2665 "Unsupported clock frequency %u\n", input_clk); in ov5670_probe()
/linux/sound/soc/codecs/
H A Dsma1303.c37 .input_clk = _input_clk,\
51 unsigned int input_clk; member
935 if (sma1303->pll_matches[i].input_clk == bclk) in sma1303_setup_pll()
H A Dsma1307.c22 .input_clk = _input_clk,\
36 unsigned int input_clk; member
87 /* in_clk_name, out_clk_name, input_clk post_n, n, vco, p_cp */
1136 if (sma1307->pll_matches[i].input_clk == bclk) in sma1307_setup_pll()