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Searched refs:gpu_read64 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/panthor/
H A Dpanthor_pwr.c217 drm_info(&ptdev->base, "PWR_STATUS: 0x%016llx", gpu_read64(pwr->iomem, PWR_STATUS)); in panthor_pwr_debug_info_show()
218 drm_info(&ptdev->base, "L2_PRESENT: 0x%016llx", gpu_read64(pwr->iomem, PWR_L2_PRESENT)); in panthor_pwr_debug_info_show()
219 drm_info(&ptdev->base, "L2_PWRTRANS: 0x%016llx", gpu_read64(pwr->iomem, PWR_L2_PWRTRANS)); in panthor_pwr_debug_info_show()
220 drm_info(&ptdev->base, "L2_READY: 0x%016llx", gpu_read64(pwr->iomem, PWR_L2_READY)); in panthor_pwr_debug_info_show()
221 drm_info(&ptdev->base, "TILER_PRESENT: 0x%016llx", gpu_read64(pwr->iomem, PWR_TILER_PRESENT)); in panthor_pwr_debug_info_show()
222 drm_info(&ptdev->base, "TILER_PWRTRANS: 0x%016llx", gpu_read64(pwr->iomem, PWR_TILER_PWRTRANS)); in panthor_pwr_debug_info_show()
223 drm_info(&ptdev->base, "TILER_READY: 0x%016llx", gpu_read64(pwr->iomem, PWR_TILER_READY)); in panthor_pwr_debug_info_show()
224 drm_info(&ptdev->base, "SHADER_PRESENT: 0x%016llx", gpu_read64(pwr->iomem, PWR_SHADER_PRESENT)); in panthor_pwr_debug_info_show()
225 drm_info(&ptdev->base, "SHADER_PWRTRANS: 0x%016llx", gpu_read64(pwr->iomem, PWR_SHADER_PWRTRANS)); in panthor_pwr_debug_info_show()
226 drm_info(&ptdev->base, "SHADER_READY: 0x%016llx", gpu_read64(pwr->iomem, PWR_SHADER_READY)); in panthor_pwr_debug_info_show()
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H A Dpanthor_gpu.c97 gpu_read64(gpu->iomem, SHADER_READY), in panthor_gpu_irq_handler()
98 gpu_read64(gpu->iomem, TILER_READY), in panthor_gpu_irq_handler()
99 gpu_read64(gpu->iomem, L2_READY)); in panthor_gpu_irq_handler()
103 u64 address = gpu_read64(gpu->iomem, GPU_FAULT_ADDR); in panthor_gpu_irq_handler()
451 return gpu_read64(ptdev->gpu->iomem, GPU_TIMESTAMP_OFFSET); in panthor_gpu_get_timestamp_offset()
H A Dpanthor_device.h659 static inline u64 gpu_read64(void __iomem *iomem, u32 reg) in gpu_read64() function
691 read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false, \
696 read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us, \
H A Dpanthor_mmu.c1878 addr = gpu_read64(mmu->iomem, AS_FAULTADDRESS(as)); in panthor_mmu_irq_handler()
/linux/drivers/gpu/drm/msm/adreno/
H A Da5xx_gpu.c1216 uint64_t addr = gpu_read64(gpu, REG_A5XX_UCHE_TRAP_LOG); in a5xx_uche_err_irq()
1246 gpu_read64(gpu, REG_A5XX_CP_IB1_BASE), in a5xx_fault_detect_irq()
1248 gpu_read64(gpu, REG_A5XX_CP_IB2_BASE), in a5xx_fault_detect_irq()
1439 return gpu_read64(gpu, REG_A5XX_RBBM_ALWAYSON_COUNTER_LO); in a5xx_get_timestamp()
1673 busy_cycles = gpu_read64(gpu, REG_A5XX_RBBM_PERFCTR_RBBM_0_LO); in a5xx_gpu_busy()
H A Da6xx_gpu.c1840 gpu_read64(gpu, REG_A6XX_CP_IB1_BASE), in a6xx_fault_detect_irq()
1842 gpu_read64(gpu, REG_A6XX_CP_IB2_BASE), in a6xx_fault_detect_irq()
2293 return gpu_read64(gpu, REG_A6XX_CP_ALWAYS_ON_COUNTER); in a6xx_get_timestamp()
2425 .ib1_base = gpu_read64(gpu, REG_A6XX_CP_IB1_BASE), in a6xx_progress()
2426 .ib2_base = gpu_read64(gpu, REG_A6XX_CP_IB2_BASE), in a6xx_progress()
H A Da3xx_gpu.c495 busy_cycles = gpu_read64(gpu, REG_A3XX_RBBM_PERFCTR_RBBM_1_LO); in a3xx_gpu_busy()
/linux/drivers/gpu/drm/msm/
H A Dmsm_gpu.h666 static inline u64 gpu_read64(struct msm_gpu *gpu, u32 reg) in gpu_read64() function