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Searched refs:funcs (Results 1 – 25 of 913) sorted by relevance

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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_ddp_comp.h99 const struct mtk_ddp_comp_funcs *funcs; member
104 if (comp->funcs && comp->funcs->power_on) in mtk_ddp_comp_power_on()
105 return comp->funcs->power_on(comp->dev); in mtk_ddp_comp_power_on()
113 if (comp->funcs && comp->funcs->power_off) in mtk_ddp_comp_power_off()
114 comp->funcs->power_off(comp->dev); in mtk_ddp_comp_power_off()
121 if (comp->funcs && comp->funcs->clk_enable) in mtk_ddp_comp_clk_enable()
122 return comp->funcs->clk_enable(comp->dev); in mtk_ddp_comp_clk_enable()
129 if (comp->funcs && comp->funcs->clk_disable) in mtk_ddp_comp_clk_disable()
130 comp->funcs->clk_disable(comp->dev); in mtk_ddp_comp_clk_disable()
137 if (comp && comp->funcs && comp->funcs->mode_valid) in mtk_ddp_comp_mode_valid()
[all …]
/linux/drivers/gpu/drm/
H A Ddrm_simple_kms_helper.c92 if (!pipe->funcs || !pipe->funcs->mode_valid) in drm_simple_kms_crtc_mode_valid()
96 return pipe->funcs->mode_valid(pipe, mode); in drm_simple_kms_crtc_mode_valid()
123 if (!pipe->funcs || !pipe->funcs->enable) in drm_simple_kms_crtc_enable()
127 pipe->funcs->enable(pipe, crtc->state, plane->state); in drm_simple_kms_crtc_enable()
136 if (!pipe->funcs || !pipe->funcs->disable) in drm_simple_kms_crtc_disable()
139 pipe->funcs->disable(pipe); in drm_simple_kms_crtc_disable()
154 if (!pipe->funcs || !pipe->funcs->reset_crtc) in drm_simple_kms_crtc_reset()
157 return pipe->funcs->reset_crtc(pipe); in drm_simple_kms_crtc_reset()
165 if (!pipe->funcs || !pipe->funcs->duplicate_crtc_state) in drm_simple_kms_crtc_duplicate_state()
168 return pipe->funcs->duplicate_crtc_state(pipe); in drm_simple_kms_crtc_duplicate_state()
[all …]
H A Ddrm_bridge.c260 state = bridge->funcs->atomic_duplicate_state(bridge); in drm_bridge_atomic_duplicate_priv_state()
271 bridge->funcs->atomic_destroy_state(bridge, state); in drm_bridge_atomic_destroy_priv_state()
325 if (bridge->funcs->attach) { in drm_bridge_attach()
326 ret = bridge->funcs->attach(bridge, flags); in drm_bridge_attach()
331 if (bridge->funcs->atomic_reset) { in drm_bridge_attach()
334 state = bridge->funcs->atomic_reset(bridge); in drm_bridge_attach()
348 if (bridge->funcs->detach) in drm_bridge_attach()
349 bridge->funcs->detach(bridge); in drm_bridge_attach()
376 if (bridge->funcs->atomic_reset) in drm_bridge_detach()
379 if (bridge->funcs->detach) in drm_bridge_detach()
[all …]
H A Ddrm_panel.c58 const struct drm_panel_funcs *funcs, int connector_type) in drm_panel_init() argument
64 panel->funcs = funcs; in drm_panel_init()
123 if (panel->funcs && panel->funcs->prepare) { in drm_panel_prepare()
124 ret = panel->funcs->prepare(panel); in drm_panel_prepare()
131 ret = follower->funcs->panel_prepared(follower); in drm_panel_prepare()
134 follower->funcs->panel_prepared, ret); in drm_panel_prepare()
181 ret = follower->funcs->panel_unpreparing(follower); in drm_panel_unprepare()
184 follower->funcs->panel_unpreparing, ret); in drm_panel_unprepare()
187 if (panel->funcs && panel->funcs->unprepare) { in drm_panel_unprepare()
188 ret = panel->funcs->unprepare(panel); in drm_panel_unprepare()
[all …]
H A Ddrm_atomic_helper.c121 const struct drm_connector_helper_funcs *funcs = connector->helper_private; in handle_conflicting_encoders() local
127 if (funcs->atomic_best_encoder) in handle_conflicting_encoders()
128 new_encoder = funcs->atomic_best_encoder(connector, in handle_conflicting_encoders()
130 else if (funcs->best_encoder) in handle_conflicting_encoders()
131 new_encoder = funcs->best_encoder(connector); in handle_conflicting_encoders()
297 const struct drm_connector_helper_funcs *funcs; in update_connector_routing() local
357 funcs = connector->helper_private; in update_connector_routing()
359 if (funcs->atomic_best_encoder) in update_connector_routing()
360 new_encoder = funcs->atomic_best_encoder(connector, state); in update_connector_routing()
361 else if (funcs->best_encoder) in update_connector_routing()
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H A Ddrm_encoder.c80 if (encoder->funcs && encoder->funcs->late_register) in drm_encoder_register_all()
81 ret = encoder->funcs->late_register(encoder); in drm_encoder_register_all()
94 if (encoder->funcs && encoder->funcs->early_unregister) in drm_encoder_unregister_all()
95 encoder->funcs->early_unregister(encoder); in drm_encoder_unregister_all()
103 const struct drm_encoder_funcs *funcs, in __drm_encoder_init() argument
118 encoder->funcs = funcs; in __drm_encoder_init()
165 const struct drm_encoder_funcs *funcs, in drm_encoder_init() argument
171 WARN_ON(!funcs->destroy); in drm_encoder_init()
174 ret = __drm_encoder_init(dev, encoder, funcs, encoder_type, name, ap); in drm_encoder_init()
223 const struct drm_encoder_funcs *funcs, in __drmm_encoder_init() argument
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c100 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode)
101 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode(dc->res_pool->mpc);
103 …if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerd…
106 dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg);
109 …dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->…
140 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn35_init_hw()
141 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn35_init_hw()
145 if (!dcb->funcs->is_accelerated_mode(dcb)) { in dcn35_init_hw()
147 hws->funcs.bios_golden_init(dc); in dcn35_init_hw()
151 if (res_pool->dccg->funcs->dccg_init) in dcn35_init_hw()
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/linux/drivers/gpu/drm/amd/display/dc/link/hwss/
H A Dlink_hwss_dio.c44 stream_encoder->funcs->set_throttled_vcp_size( in set_dio_throttled_vcp_size()
54 link_enc->funcs->connect_dig_be_to_fe(link_enc, in setup_dio_stream_encoder()
59 if (stream_enc->funcs->enable_stream) in setup_dio_stream_encoder()
60 stream_enc->funcs->enable_stream(stream_enc, in setup_dio_stream_encoder()
62 if (stream_enc->funcs->map_stream_to_link) in setup_dio_stream_encoder()
63 stream_enc->funcs->map_stream_to_link(stream_enc, in setup_dio_stream_encoder()
65 if (stream_enc->funcs->set_input_mode) in setup_dio_stream_encoder()
66 stream_enc->funcs->set_input_mode(stream_enc, in setup_dio_stream_encoder()
68 if (stream_enc->funcs->enable_fifo) in setup_dio_stream_encoder()
69 stream_enc->funcs->enable_fifo(stream_enc); in setup_dio_stream_encoder()
[all …]
H A Dlink_hwss_hpo_dp.c41 hpo_dp_link_encoder->funcs->set_throttled_vcp_size(hpo_dp_link_encoder, in set_hpo_dp_throttled_vcp_size()
70 hpo_dp_stream_encoder->funcs->set_hblank_min_symbol_width(hpo_dp_stream_encoder, in set_hpo_dp_hblank_min_symbol_width()
79 stream_enc->funcs->enable_stream(stream_enc); in setup_hpo_dp_stream_encoder()
80 stream_enc->funcs->map_stream_to_link(stream_enc, stream_enc->inst, link_enc->inst); in setup_hpo_dp_stream_encoder()
87 stream_enc->funcs->disable(stream_enc); in reset_hpo_dp_stream_encoder()
96 stream_enc->funcs->set_stream_attribute( in setup_hpo_dp_stream_attribute()
118 if (link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating) in enable_hpo_dp_link_output()
119 link->dc->res_pool->dccg->funcs->set_symclk32_le_root_clock_gating( in enable_hpo_dp_link_output()
123 link_res->hpo_dp_link_enc->funcs->enable_link_phy( in enable_hpo_dp_link_output()
139 link_res->hpo_dp_link_enc->funcs->link_disable(link_res->hpo_dp_link_enc); in disable_hpo_dp_link_output()
[all …]
/linux/lib/
H A Dtest_min_heap.c28 const struct min_heap_callbacks *funcs) in pop_verify_heap() argument
35 min_heap_pop(heap, funcs, NULL); in pop_verify_heap()
51 min_heap_pop(heap, funcs, NULL); in pop_verify_heap()
65 struct min_heap_callbacks funcs = { in test_heapify_all() local
72 min_heapify_all(&heap, &funcs, NULL); in test_heapify_all()
73 err = pop_verify_heap(min_heap, &heap, &funcs); in test_heapify_all()
81 min_heapify_all(&heap, &funcs, NULL); in test_heapify_all()
82 err += pop_verify_heap(min_heap, &heap, &funcs); in test_heapify_all()
97 struct min_heap_callbacks funcs = { in test_heap_push() local
105 min_heap_push(&heap, &data[i], &funcs, NULL); in test_heap_push()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c94 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode) in enable_memory_low_power()
95 dc->res_pool->mpc->funcs->set_mpc_mem_lp_mode(dc->res_pool->mpc); in enable_memory_low_power()
98 …if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerd… in enable_memory_low_power()
102 dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg); in enable_memory_low_power()
104 …dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->… in enable_memory_low_power()
119 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn31_init_hw()
120 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn31_init_hw()
122 if (!dcb->funcs->is_accelerated_mode(dcb)) { in dcn31_init_hw()
123 hws->funcs.bios_golden_init(dc); in dcn31_init_hw()
124 if (hws->funcs.disable_vga) in dcn31_init_hw()
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_psp.h325 const struct psp_funcs *funcs; member
414 #define psp_ring_create(psp, type) (psp)->funcs->ring_create((psp), (type))
415 #define psp_ring_stop(psp, type) (psp)->funcs->ring_stop((psp), (type))
416 #define psp_ring_destroy(psp, type) ((psp)->funcs->ring_destroy((psp), (type)))
418 ((psp)->funcs->init_microcode ? (psp)->funcs->init_microcode((psp)) : 0)
420 ((psp)->funcs->bootloader_load_kdb ? (psp)->funcs->bootloader_load_kdb((psp)) : 0)
422 ((psp)->funcs->bootloader_load_spl ? (psp)->funcs->bootloader_load_spl((psp)) : 0)
424 ((psp)->funcs->bootloader_load_sysdrv ? (psp)->funcs->bootloader_load_sysdrv((psp)) : 0)
426 ((psp)->funcs->bootloader_load_soc_drv ? (psp)->funcs->bootloader_load_soc_drv((psp)) : 0)
428 ((psp)->funcs->bootloader_load_intf_drv ? (psp)->funcs->bootloader_load_intf_drv((psp)) : 0)
[all …]
H A Damdgpu_ib.c179 (!ring->funcs->secure_submission_supported)) { in amdgpu_ib_schedule()
184 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule()
185 ring->funcs->emit_ib_size; in amdgpu_ib_schedule()
194 if (ring->funcs->emit_pipeline_sync && job && in amdgpu_ib_schedule()
206 if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) in amdgpu_ib_schedule()
207 ring->funcs->emit_mem_sync(ring); in amdgpu_ib_schedule()
209 if (ring->funcs->emit_wave_limit && in amdgpu_ib_schedule()
211 ring->funcs->emit_wave_limit(ring, true); in amdgpu_ib_schedule()
213 if (ring->funcs->insert_start) in amdgpu_ib_schedule()
214 ring->funcs->insert_start(ring); in amdgpu_ib_schedule()
[all …]
H A Damdgpu_umsch_mm.h139 const struct umsch_mm_funcs *funcs; member
212 ((umsch)->funcs->set_hw_resources ? (umsch)->funcs->set_hw_resources((umsch)) : 0)
214 ((umsch)->funcs->add_queue ? (umsch)->funcs->add_queue((umsch), (input)) : 0)
216 ((umsch)->funcs->remove_queue ? (umsch)->funcs->remove_queue((umsch), (input)) : 0)
219 ((umsch)->funcs->set_regs ? (umsch)->funcs->set_regs((umsch)) : 0)
221 ((umsch)->funcs->init_microcode ? (umsch)->funcs->init_microcode((umsch)) : 0)
223 ((umsch)->funcs->load_microcode ? (umsch)->funcs->load_microcode((umsch)) : 0)
226 ((umsch)->funcs->ring_init ? (umsch)->funcs->ring_init((umsch)) : 0)
228 ((umsch)->funcs->ring_start ? (umsch)->funcs->ring_start((umsch)) : 0)
230 ((umsch)->funcs->ring_stop ? (umsch)->funcs->ring_stop((umsch)) : 0)
[all …]
H A Damdgpu_display.h26 #define amdgpu_display_vblank_get_counter(adev, crtc) (adev)->mode_info.funcs->vblank_get_counter((…
27 #define amdgpu_display_backlight_set_level(adev, e, l) (adev)->mode_info.funcs->backlight_set_level…
28 #define amdgpu_display_backlight_get_level(adev, e) (adev)->mode_info.funcs->backlight_get_level((e…
29 #define amdgpu_display_hpd_sense(adev, h) (adev)->mode_info.funcs->hpd_sense((adev), (h))
30 #define amdgpu_display_hpd_set_polarity(adev, h) (adev)->mode_info.funcs->hpd_set_polarity((adev), …
31 #define amdgpu_display_hpd_get_gpio_reg(adev) (adev)->mode_info.funcs->hpd_get_gpio_reg((adev))
32 #define amdgpu_display_bandwidth_update(adev) (adev)->mode_info.funcs->bandwidth_update((adev))
33 #define amdgpu_display_page_flip(adev, crtc, base, async) (adev)->mode_info.funcs->page_flip((adev)…
34 #define amdgpu_display_page_flip_get_scanoutpos(adev, crtc, vbl, pos) (adev)->mode_info.funcs->page…
35 #define amdgpu_display_add_encoder(adev, e, s, c) (adev)->mode_info.funcs->add_encoder((adev), (e),…
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H A Damdgpu_ring.c85 ndw = (ndw + ring->funcs->align_mask) & ~ring->funcs->align_mask; in amdgpu_ring_alloc()
96 if (ring->funcs->begin_use) in amdgpu_ring_alloc()
97 ring->funcs->begin_use(ring); in amdgpu_ring_alloc()
119 memset32(&ring->ring[occupied], ring->funcs->nop, chunk1); in amdgpu_ring_insert_nop()
122 memset32(ring->ring, ring->funcs->nop, chunk2); in amdgpu_ring_insert_nop()
139 while (ib->length_dw & ring->funcs->align_mask) in amdgpu_ring_generic_pad_ib()
140 ib->ptr[ib->length_dw++] = ring->funcs->nop; in amdgpu_ring_generic_pad_ib()
160 count = ring->funcs->align_mask + 1 - in amdgpu_ring_commit()
161 (ring->wptr & ring->funcs->align_mask); in amdgpu_ring_commit()
162 count &= ring->funcs->align_mask; in amdgpu_ring_commit()
[all …]
H A Damdgpu_ring.h244 const struct amdgpu_ring_funcs *funcs; member
312 #define amdgpu_ring_parse_cs(r, p, job, ib) ((r)->funcs->parse_cs((p), (job), (ib)))
313 #define amdgpu_ring_patch_cs_in_place(r, p, job, ib) ((r)->funcs->patch_cs_in_place((p), (job), (ib…
314 #define amdgpu_ring_test_ring(r) (r)->funcs->test_ring((r))
315 #define amdgpu_ring_test_ib(r, t) ((r)->funcs->test_ib ? (r)->funcs->test_ib((r), (t)) : 0)
316 #define amdgpu_ring_get_rptr(r) (r)->funcs->get_rptr((r))
317 #define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r))
318 #define amdgpu_ring_set_wptr(r) (r)->funcs->set_wptr((r))
319 #define amdgpu_ring_emit_ib(r, job, ib, flags) ((r)->funcs->emit_ib((r), (job), (ib), (flags)))
320 #define amdgpu_ring_emit_pipeline_sync(r) (r)->funcs->emit_pipeline_sync((r))
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/
H A Ddcn30_hwseq.c90 dpp->funcs->dpp_read_state(dpp, &s); in dcn30_log_color_state()
91 dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); in dcn30_log_color_state()
172 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn30_log_color_state()
238 result = dpp_base->funcs->dpp_program_blnd_lut(dpp_base, blend_lut); in dcn30_set_blend_lut()
280 acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, in dcn30_set_mpc_shaper_3dlut()
285 result = mpc->funcs->program_3dlut(mpc, &stream->lut3d_func->lut_3d, in dcn30_set_mpc_shaper_3dlut()
290 result = mpc->funcs->program_shaper(mpc, shaper_lut, in dcn30_set_mpc_shaper_3dlut()
297 mpc->funcs->release_rmu(mpc, mpcc_id); in dcn30_set_mpc_shaper_3dlut()
321 dpp_base->funcs->dpp_set_pre_degam(dpp_base, tf); in dcn30_set_input_transfer_func()
330 result = dpp_base->funcs->dpp_program_gamcor_lut(dpp_base, params); in dcn30_set_input_transfer_func()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c118 !tg->funcs->is_tg_enabled(tg) || in dcn10_lock_all_pipes()
151 dc->res_pool->hubbub->funcs->wm_read_state(dc->res_pool->hubbub, &wm); in dcn10_log_hubbub_state()
184 hubp->funcs->hubp_read_state(hubp); in dcn10_log_hubp_states()
304 dpp->funcs->dpp_read_state(dpp, &s); in dcn10_log_color_state()
305 if (dpp->funcs->dpp_get_gamut_remap) { in dcn10_log_color_state()
306 dpp->funcs->dpp_get_gamut_remap(dpp, &s.gamut_remap); in dcn10_log_color_state()
379 pool->mpc->funcs->read_mpcc_state(pool->mpc, i, &s); in dcn10_log_color_state()
427 if (pool->opps[i]->funcs->dpg_is_blanked) in dcn10_log_hw_state()
428 s.blank_enabled = pool->opps[i]->funcs->dpg_is_blanked(pool->opps[i]); in dcn10_log_hw_state()
430 s.blank_enabled = tg->funcs->is_blanked(tg); in dcn10_log_hw_state()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c149 pipe_ctx->plane_res.hubp->funcs->hubp_program_surface_flip_and_addr( in dcn201_update_plane_addr()
180 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank()
185 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank()
189 opp->funcs->opp_set_disp_pattern_generator( in dcn201_init_blank()
199 hws->funcs.wait_for_blank_complete(opp); in dcn201_init_blank()
231 if (res_pool->dccg->funcs->dccg_init) in dcn201_init_hw()
232 res_pool->dccg->funcs->dccg_init(res_pool->dccg); in dcn201_init_hw()
234 if (dc->clk_mgr && dc->clk_mgr->funcs->init_clocks) in dcn201_init_hw()
235 dc->clk_mgr->funcs->init_clocks(dc->clk_mgr); in dcn201_init_hw()
237 hws->funcs.bios_golden_init(dc); in dcn201_init_hw()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c228 bp_result = dcb->funcs->enable_disp_power_gating( in dce110_enable_display_power_gating()
296 ipp->funcs->ipp_program_prescale(ipp, &prescale_params); in dce110_set_input_transfer_func()
300 ipp->funcs->ipp_program_input_lut(ipp, &plane_state->gamma_correction); in dce110_set_input_transfer_func()
305 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_sRGB); in dce110_set_input_transfer_func()
308 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_HW_xvYCC); in dce110_set_input_transfer_func()
311 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); in dce110_set_input_transfer_func()
319 ipp->funcs->ipp_set_degamma(ipp, IPP_DEGAMMA_MODE_BYPASS); in dce110_set_input_transfer_func()
610 xfm->funcs->opp_power_on_regamma_lut(xfm, true); in dce110_set_output_transfer_func()
615 xfm->funcs->opp_set_regamma_mode(xfm, OPP_REGAMMA_SRGB); in dce110_set_output_transfer_func()
618 xfm->funcs->opp_program_regamma_pwl(xfm, &xfm->regamma_params); in dce110_set_output_transfer_func()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
H A Ddcn314_hwseq.c98 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
99 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
104 odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
105 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in update_dsc_on_stream()
114 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
120 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in update_dsc_on_stream()
125 dsc->funcs->dsc_disable(pipe_ctx->stream_res.dsc); in update_dsc_on_stream()
128 odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc); in update_dsc_on_stream()
169 pipe_ctx->stream_res.tg->funcs->set_odm_combine( in dcn314_update_odm()
174 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn314_update_odm()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn351/
H A Ddcn351_hwseq.c110 if (pg_cntl->funcs->dsc_pg_control) in dcn351_hw_block_power_down()
111 pg_cntl->funcs->dsc_pg_control(pg_cntl, i, false); in dcn351_hw_block_power_down()
116 if (pg_cntl->funcs->hubp_dpp_pg_control) in dcn351_hw_block_power_down()
117 pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, false); in dcn351_hw_block_power_down()
124 if (pg_cntl->funcs->plane_otg_pg_control) in dcn351_hw_block_power_down()
125 pg_cntl->funcs->plane_otg_pg_control(pg_cntl, false); in dcn351_hw_block_power_down()
165 if (pg_cntl->funcs->plane_otg_pg_control) in dcn351_hw_block_power_up()
166 pg_cntl->funcs->plane_otg_pg_control(pg_cntl, true); in dcn351_hw_block_power_up()
173 if (pg_cntl->funcs->hubp_dpp_pg_control) in dcn351_hw_block_power_up()
174 pg_cntl->funcs->hubp_dpp_pg_control(pg_cntl, i, true); in dcn351_hw_block_power_up()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_edid_parser.c38 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_send_cea()
39 dmcu->funcs->send_edid_cea) { in dc_edid_parser_send_cea()
40 return dmcu->funcs->send_edid_cea(dmcu, in dc_edid_parser_send_cea()
55 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_recv_cea_ack()
56 dmcu->funcs->recv_edid_cea_ack) { in dc_edid_parser_recv_cea_ack()
57 return dmcu->funcs->recv_edid_cea_ack(dmcu, offset); in dc_edid_parser_recv_cea_ack()
71 dmcu->funcs->is_dmcu_initialized(dmcu) && in dc_edid_parser_recv_amd_vsdb()
72 dmcu->funcs->recv_amd_vsdb) { in dc_edid_parser_recv_amd_vsdb()
73 return dmcu->funcs->recv_amd_vsdb(dmcu, in dc_edid_parser_recv_amd_vsdb()
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn35/
H A Ddcn35_optc.c241 if (optc->funcs && optc->funcs->setup_manual_trigger) in optc35_setup_manual_trigger()
242 optc->funcs->setup_manual_trigger(optc); in optc35_setup_manual_trigger()
272 if (optc->funcs && optc->funcs->set_vtotal_min_max) in optc35_set_drr()
273 optc->funcs->set_vtotal_min_max(optc, in optc35_set_drr()
283 if (optc->funcs && optc->funcs->set_vtotal_min_max) in optc35_set_drr()
284 optc->funcs->set_vtotal_min_max(optc, 0, 0); in optc35_set_drr()
312 if (optc->funcs && optc->funcs->set_vtotal_min_max) in optc35_set_long_vtotal()
313 optc->funcs->set_vtotal_min_max(optc, 0, 0); in optc35_set_long_vtotal()
324 if (optc->funcs && optc->funcs->set_vtotal_min_max) in optc35_set_long_vtotal()
325 optc->funcs->set_vtotal_min_max(optc, max_otg_v_total, max_otg_v_total); in optc35_set_long_vtotal()
[all …]

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