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Searched refs:dsp_parents (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/clk/mediatek/
H A Dclk-mt8195-topckgen.c257 static const char * const dsp_parents[] = { variable
904 dsp_parents, 0x038, 0x03C, 0x040, 24, 3, 31, 0x04, 11),
920 dsp_parents, 0x050, 0x054, 0x058, 16, 3, 23, 0x04, 18),
H A Dclk-mt8183.c148 static const char * const dsp_parents[] = { variable
470 dsp_parents, 0x50, 0x54, 0x58, 0, 4, 7, 0x004, 4),
H A Dclk-mt8365.c308 static const char * const dsp_parents[] = { variable
505 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP_SEL, "dsp_sel", dsp_parents, 0x0c0,
H A Dclk-mt8188-topckgen.c257 static const char * const dsp_parents[] = { variable
990 dsp_parents, 0x044, 0x048, 0x04C, 0, 4, 7, 0x04, 12),
H A Dclk-mt6779.c201 static const char * const dsp_parents[] = { variable
658 MUX_GATE_CLR_SET_UPD(CLK_TOP_DSP, "dsp_sel", dsp_parents,
H A Dclk-mt8196-topckgen.c377 static const char * const dsp_parents[] = { variable
699 dsp_parents, CLK_CFG_5, CLK_CFG_5_SET,
/linux/drivers/clk/sunxi-ng/
H A Dccu-sun55i-a523-mcu.c80 static const struct clk_parent_data dsp_parents[] = { variable
93 static SUNXI_CCU_M_DATA_WITH_MUX_GATE(dsp_clk, "mcu-dsp", dsp_parents, 0x0020,
H A Dccu-sun20i-d1.c850 static const struct clk_parent_data dsp_parents[] = { variable
857 static SUNXI_CCU_M_DATA_WITH_MUX_GATE(dsp_clk, "dsp", dsp_parents, 0xc70,
H A Dccu-sun55i-a523.c1110 static const struct clk_parent_data dsp_parents[] = { variable
1117 static SUNXI_CCU_M_DATA_WITH_MUX_GATE(dsp_clk, "dsp", dsp_parents, 0xc70,