Searched refs:dpll_hw_state (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_lt_phy.c | 1909 const struct intel_dpll_hw_state *dpll_hw_state) in intel_lt_phy_pll_enable() argument 1912 int port_clock = intel_lt_phy_calc_port_clock(display, &dpll_hw_state->ltpll); in intel_lt_phy_pll_enable() 1928 intel_lt_phy_lane_reset(encoder, dpll_hw_state->ltpll.lane_count); in intel_lt_phy_pll_enable() 1931 intel_lt_phy_program_port_clock_ctl(encoder, &dpll_hw_state->ltpll, in intel_lt_phy_pll_enable() 1942 if (intel_lt_phy_config_changed(encoder, &dpll_hw_state->ltpll, port_clock)) { in intel_lt_phy_pll_enable() 1947 intel_lt_phy_program_pll(encoder, &dpll_hw_state->ltpll); in intel_lt_phy_pll_enable() 2039 intel_lt_phy_enable_disable_tx(encoder, &dpll_hw_state->ltpll); in intel_lt_phy_pll_enable() 2282 const struct intel_dpll_hw_state *dpll_hw_state) in intel_xe3plpd_pll_enable() argument 2284 intel_lt_phy_pll_enable(encoder, pll, dpll_hw_state); in intel_xe3plpd_pll_enable()
|
| H A D | intel_ddi.c | 4261 &crtc_state->dpll_hw_state); in intel_ddi_get_clock() 4295 &crtc_state->dpll_hw_state); in mtl_ddi_cx0_get_config() 4331 intel_mpllb_readout_hw_state(encoder, &crtc_state->dpll_hw_state.mpllb); in dg2_ddi_get_config() 4332 crtc_state->port_clock = intel_mpllb_calc_port_clock(encoder, &crtc_state->dpll_hw_state.mpllb); in dg2_ddi_get_config() 4420 &crtc_state->dpll_hw_state); in icl_ddi_tc_get_clock()
|
| H A D | intel_display_types.h | 1159 struct intel_dpll_hw_state dpll_hw_state; member
|
| H A D | intel_cx0_phy.c | 3415 const struct intel_dpll_hw_state *dpll_hw_state) in intel_mtl_pll_enable() argument 3417 intel_cx0pll_enable(encoder, &dpll_hw_state->cx0pll); in intel_mtl_pll_enable()
|