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/linux/arch/m68k/ifpsp060/
H A Dpfpsp.sa1 dc.l $60ff0000,$17400000,$60ff0000,$15f40000
2 dc.l $60ff0000,$02b60000,$60ff0000,$04700000
3 dc.l $60ff0000,$1b100000,$60ff0000,$19aa0000
4 dc.l $60ff0000,$1b5a0000,$60ff0000,$062e0000
5 dc.l $60ff0000,$102c0000,$51fc51fc,$51fc51fc
6 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
7 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
8 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
9 dc.l $2f00203a,$ff2c487b,$0930ffff,$fef8202f
10 dc.l $00044e74,$00042f00,$203afef2,$487b0930
[all …]
H A Dfplsp.sa1 dc.l $60ff0000,$238e0000,$60ff0000,$24200000
2 dc.l $60ff0000,$24b60000,$60ff0000,$11060000
3 dc.l $60ff0000,$11980000,$60ff0000,$122e0000
4 dc.l $60ff0000,$0f160000,$60ff0000,$0fa80000
5 dc.l $60ff0000,$103e0000,$60ff0000,$12ae0000
6 dc.l $60ff0000,$13400000,$60ff0000,$13d60000
7 dc.l $60ff0000,$05ae0000,$60ff0000,$06400000
8 dc.l $60ff0000,$06d60000,$60ff0000,$213e0000
9 dc.l $60ff0000,$21d00000,$60ff0000,$22660000
10 dc.l $60ff0000,$16160000,$60ff0000,$16a80000
[all …]
H A Ditest.sa1 dc.l $60ff0000,$005c5465,$7374696e,$67203638
2 dc.l $30363020,$49535020,$73746172,$7465643a
3 dc.l $0a007061,$73736564,$0a002066,$61696c65
4 dc.l $640a0000,$4a80660e,$487affe8,$61ff0000
5 dc.l $4f9a588f,$4e752f01,$61ff0000,$4fa4588f
6 dc.l $487affd8,$61ff0000,$4f82588f,$4e754e56
7 dc.l $ff6048e7,$3f3c487a,$ff9e61ff,$00004f6c
8 dc.l $588f42ae,$ff78487b,$01700000,$00ea61ff
9 dc.l $00004f58,$588f61ff,$000000f0,$61ffffff
10 dc.l $ffa642ae,$ff78487b,$01700000,$0af661ff
[all …]
H A Dftest.sa1 dc.l $60ff0000,$00d40000,$60ff0000,$016c0000
2 dc.l $60ff0000,$01a80000,$54657374,$696e6720
3 dc.l $36383036,$30204650,$53502073,$74617274
4 dc.l $65643a0a,$00546573,$74696e67,$20363830
5 dc.l $36302046,$50535020,$756e696d,$706c656d
6 dc.l $656e7465,$6420696e,$73747275,$6374696f
7 dc.l $6e207374,$61727465,$643a0a00,$54657374
8 dc.l $696e6720,$36383036,$30204650,$53502065
9 dc.l $78636570,$74696f6e,$20656e61,$626c6564
10 dc.l $20737461,$72746564,$3a0a0070,$61737365
[all …]
H A Dilsp.sa1 dc.l $60ff0000,$01fe0000,$60ff0000,$02080000
2 dc.l $60ff0000,$04900000,$60ff0000,$04080000
3 dc.l $60ff0000,$051e0000,$60ff0000,$053c0000
4 dc.l $60ff0000,$055a0000,$60ff0000,$05740000
5 dc.l $60ff0000,$05940000,$60ff0000,$05b40000
6 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
7 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
8 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
9 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
10 dc.l $51fc51fc,$51fc51fc,$51fc51fc,$51fc51fc
[all …]
/linux/drivers/dma/
H A Dtxx9dmac.c24 static struct txx9dmac_cregs __iomem *__dma_regs(const struct txx9dmac_chan *dc) in __dma_regs() argument
26 return dc->ch_regs; in __dma_regs()
30 const struct txx9dmac_chan *dc) in __dma_regs32() argument
32 return dc->ch_regs; in __dma_regs32()
35 #define channel64_readq(dc, name) \ argument
36 __raw_readq(&(__dma_regs(dc)->name))
37 #define channel64_writeq(dc, name, val) \ argument
38 __raw_writeq((val), &(__dma_regs(dc)->name))
39 #define channel64_readl(dc, name) \ argument
40 __raw_readl(&(__dma_regs(dc)->name))
[all …]
/linux/drivers/tty/
H A Dnozomi.c315 struct nozomi *dc; member
463 static void nozomi_setup_memory(struct nozomi *dc) in nozomi_setup_memory() argument
465 void __iomem *offset = dc->base_addr + dc->config_table.dl_start; in nozomi_setup_memory()
472 dc->port[PORT_MDM].dl_addr[CH_A] = offset; in nozomi_setup_memory()
473 dc->port[PORT_MDM].dl_addr[CH_B] = in nozomi_setup_memory()
474 (offset += dc->config_table.dl_mdm_len1); in nozomi_setup_memory()
475 dc->port[PORT_MDM].dl_size[CH_A] = in nozomi_setup_memory()
476 dc->config_table.dl_mdm_len1 - buff_offset; in nozomi_setup_memory()
477 dc->port[PORT_MDM].dl_size[CH_B] = in nozomi_setup_memory()
478 dc->config_table.dl_mdm_len2 - buff_offset; in nozomi_setup_memory()
[all …]
/linux/drivers/md/
H A Ddm-delay.c59 struct delay_c *dc = timer_container_of(dc, t, delay_timer); in handle_delayed_timer() local
61 queue_work(dc->kdelayd_wq, &dc->flush_expired_bios); in handle_delayed_timer()
64 static void queue_timeout(struct delay_c *dc, unsigned long expires) in queue_timeout() argument
66 timer_reduce(&dc->delay_timer, expires); in queue_timeout()
69 static inline bool delay_is_fast(struct delay_c *dc) in delay_is_fast() argument
71 return !!dc->worker; in delay_is_fast()
86 static void flush_delayed_bios(struct delay_c *dc, bool flush_all) in flush_delayed_bios() argument
95 mutex_lock(&dc->process_bios_lock); in flush_delayed_bios()
96 spin_lock(&dc->delayed_bios_lock); in flush_delayed_bios()
97 list_replace_init(&dc->delayed_bios, &local_list); in flush_delayed_bios()
[all …]
/linux/drivers/scsi/esas2r/
H A Desas2r_disc.c291 struct esas2r_disc_context *dc = &a->disc_ctx; in esas2r_disc_queue_event() local
298 dc->disc_evt |= disc_evt; in esas2r_disc_queue_event()
314 struct esas2r_disc_context *dc = &a->disc_ctx; in esas2r_disc_start_port() local
326 if (dc->disc_evt) { in esas2r_disc_start_port()
352 esas2r_trace("disc_evt: %d", dc->disc_evt); in esas2r_disc_start_port()
354 dc->flags = 0; in esas2r_disc_start_port()
357 dc->flags |= DCF_POLLED; in esas2r_disc_start_port()
359 rq->interrupt_cx = dc; in esas2r_disc_start_port()
363 if (dc->disc_evt & DCDE_DEV_SCAN) { in esas2r_disc_start_port()
364 dc->disc_evt &= ~DCDE_DEV_SCAN; in esas2r_disc_start_port()
[all …]
H A Desas2r_targdb.c121 dc) in esas2r_targ_db_add_raid()
127 if (dc->curr_virt_id >= ESAS2R_MAX_TARGETS) { in esas2r_targ_db_add_raid()
133 t = a->targetdb + dc->curr_virt_id; in esas2r_targ_db_add_raid()
140 esas2r_hdebug("add RAID %s, T:%d", dc->raid_grp_name, in esas2r_targ_db_add_raid()
145 if (dc->interleave == 0 in esas2r_targ_db_add_raid()
146 || dc->block_size == 0) { in esas2r_targ_db_add_raid()
156 t->block_size = dc->block_size; in esas2r_targ_db_add_raid()
157 t->inter_byte = dc->interleave; in esas2r_targ_db_add_raid()
158 t->inter_block = dc->interleave / dc->block_size; in esas2r_targ_db_add_raid()
159 t->virt_targ_id = dc->curr_virt_id; in esas2r_targ_db_add_raid()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.h31 void dcn20_populate_dml_writeback_from_context(struct dc *dc,
39 void dcn20_calculate_dlg_params(struct dc *dc,
44 int dcn20_populate_dml_pipes_from_context(struct dc *dc,
48 void dcn20_calculate_wm(struct dc *dc,
57 void dcn20_update_bounding_box(struct dc *dc,
62 void dcn20_patch_bounding_box(struct dc *dc,
64 bool dcn20_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
75 int dcn21_populate_dml_pipes_from_context(struct dc *dc,
79 bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, enum
81 void dcn21_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
[all …]
/linux/drivers/clk/mvebu/
H A Ddove-divider.c51 static unsigned int dove_get_divider(struct dove_clk *dc) in dove_get_divider() argument
56 val = readl_relaxed(dc->base + DIV_CTRL0); in dove_get_divider()
57 val >>= dc->div_bit_start; in dove_get_divider()
59 divider = val & ~(~0 << dc->div_bit_size); in dove_get_divider()
61 if (dc->divider_table) in dove_get_divider()
62 divider = dc->divider_table[divider]; in dove_get_divider()
67 static int dove_calc_divider(const struct dove_clk *dc, unsigned long rate, in dove_calc_divider() argument
74 if (dc->divider_table) { in dove_calc_divider()
77 for (i = 0; dc->divider_table[i]; i++) in dove_calc_divider()
78 if (divider == dc->divider_table[i]) { in dove_calc_divider()
[all …]
/linux/drivers/md/bcache/
H A Dwriteback.h78 static inline bool bcache_dev_stripe_dirty(struct cached_dev *dc, in bcache_dev_stripe_dirty() argument
82 int stripe = offset_to_stripe(&dc->disk, offset); in bcache_dev_stripe_dirty()
88 if (atomic_read(dc->disk.stripe_sectors_dirty + stripe)) in bcache_dev_stripe_dirty()
91 if (nr_sectors <= dc->disk.stripe_size) in bcache_dev_stripe_dirty()
94 nr_sectors -= dc->disk.stripe_size; in bcache_dev_stripe_dirty()
102 static inline bool should_writeback(struct cached_dev *dc, struct bio *bio, in should_writeback() argument
105 unsigned int in_use = dc->disk.c->gc_stats.in_use; in should_writeback()
108 test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags) || in should_writeback()
115 if (dc->partial_stripes_expensive && in should_writeback()
116 bcache_dev_stripe_dirty(dc, bio->bi_iter.bi_sector, in should_writeback()
[all …]
H A Dsysfs.c172 struct cached_dev *dc = container_of(kobj, struct cached_dev, in SHOW() local
175 int wb = dc->writeback_running; in SHOW()
177 #define var(stat) (dc->stat) in SHOW()
182 BDEV_CACHE_MODE(&dc->sb)); in SHOW()
187 dc->cache_readahead_policy); in SHOW()
192 dc->stop_when_cache_set_failed); in SHOW()
195 sysfs_printf(data_csum, "%i", dc->disk.data_csum); in SHOW()
204 wb ? atomic_long_read(&dc->writeback_rate.rate) << 9 : 0); in SHOW()
205 sysfs_printf(io_errors, "%i", atomic_read(&dc->io_errors)); in SHOW()
206 sysfs_printf(io_error_limit, "%i", dc->error_limit); in SHOW()
[all …]
H A Drequest.c30 static unsigned int cache_mode(struct cached_dev *dc) in cache_mode() argument
32 return BDEV_CACHE_MODE(&dc->sb); in cache_mode()
35 static bool verify(struct cached_dev *dc) in verify() argument
37 return dc->verify; in verify()
358 static struct hlist_head *iohash(struct cached_dev *dc, uint64_t k) in iohash() argument
360 return &dc->io_hash[hash_64(k, RECENT_IO_BITS)]; in iohash()
363 static bool check_should_bypass(struct cached_dev *dc, struct bio *bio) in check_should_bypass() argument
365 struct cache_set *c = dc->disk.c; in check_should_bypass()
366 unsigned int mode = cache_mode(dc); in check_should_bypass()
371 if (test_bit(BCACHE_DEV_DETACHING, &dc->disk.flags) || in check_should_bypass()
[all …]
/linux/drivers/gpu/ipu-v3/
H A Dipu-dc.c109 static void dc_link_event(struct ipu_dc *dc, int event, int addr, int priority) in dc_link_event() argument
113 reg = readl(dc->base + DC_RL_CH(event)); in dc_link_event()
116 writel(reg, dc->base + DC_RL_CH(event)); in dc_link_event()
119 static void dc_write_tmpl(struct ipu_dc *dc, int word, u32 opcode, u32 operand, in dc_write_tmpl() argument
122 struct ipu_dc_priv *priv = dc->priv; in dc_write_tmpl()
160 int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced, in ipu_dc_init_sync() argument
163 struct ipu_dc_priv *priv = dc->priv; in ipu_dc_init_sync()
168 dc->di = ipu_di_get_num(di); in ipu_dc_init_sync()
186 if (dc->di) in ipu_dc_init_sync()
192 dc_link_event(dc, DC_EVT_NL, addr, 3); in ipu_dc_init_sync()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.h38 void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
39 void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context);
42 struct dc *dc, struct dc_state *context,
47 void dcn31_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
48 void dcn315_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
49 void dcn316_update_bw_bounding_box_fpu(struct dc *dc, struct clk_bw_params *bw_params);
55 int dcn31x_populate_dml_pipes_from_context(struct dc *dc,
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.h32 void dcn201_init_hw(struct dc *dc);
35 void dcn201_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx);
36 void dcn201_plane_atomic_disconnect(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ct…
37 void dcn201_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);
40 struct dc *dc,
44 struct dc *dc,
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_resource.c41 pipe = &link->dc->current_state->res_ctx.pipe_ctx[i]; in link_get_cur_link_res()
52 void link_get_cur_res_map(const struct dc *dc, uint32_t *map) in link_get_cur_res_map() argument
60 if (dc->caps.dp_hpo) { in link_get_cur_res_map()
61 for (i = 0; i < dc->caps.max_links; i++) { in link_get_cur_res_map()
62 link = dc->links[i]; in link_get_cur_res_map()
75 void link_restore_res_map(const struct dc *dc, uint32_t *map) in link_restore_res_map() argument
83 if (dc->caps.dp_hpo) { in link_restore_res_map()
84 available_hpo_dp_count = dc->res_pool->hpo_dp_link_enc_count; in link_restore_res_map()
86 for (i = 0; i < dc->caps.max_links; i++) { in link_restore_res_map()
88 link = dc->links[i]; in link_restore_res_map()
[all …]
/linux/include/trace/events/
H A Dtegra_apb_dma.h11 TP_PROTO(struct dma_chan *dc, dma_cookie_t cookie, struct dma_tx_state *state),
12 TP_ARGS(dc, cookie, state),
14 __string(chan, dev_name(&dc->dev->device))
28 TP_PROTO(struct dma_chan *dc, int count, void *ptr),
29 TP_ARGS(dc, count, ptr),
31 __string(chan, dev_name(&dc->dev->device))
45 TP_PROTO(struct dma_chan *dc, int irq),
46 TP_ARGS(dc, irq),
48 __string(chan, dev_name(&dc->dev->device))
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn351/
H A Ddcn351_hwseq.h32 void dcn351_calc_blocks_to_gate(struct dc *dc, struct dc_state *context,
34 void dcn351_calc_blocks_to_ungate(struct dc *dc, struct dc_state *context,
36 void dcn351_hw_block_power_up(struct dc *dc,
38 void dcn351_hw_block_power_down(struct dc *dc,
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_edid_parser.c29 bool dc_edid_parser_send_cea(struct dc *dc, in dc_edid_parser_send_cea() argument
35 struct dmcu *dmcu = dc->res_pool->dmcu; in dc_edid_parser_send_cea()
50 bool dc_edid_parser_recv_cea_ack(struct dc *dc, int *offset) in dc_edid_parser_recv_cea_ack() argument
52 struct dmcu *dmcu = dc->res_pool->dmcu; in dc_edid_parser_recv_cea_ack()
63 bool dc_edid_parser_recv_amd_vsdb(struct dc *dc, in dc_edid_parser_recv_amd_vsdb() argument
68 struct dmcu *dmcu = dc->res_pool->dmcu; in dc_edid_parser_recv_amd_vsdb()
/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.h31 struct dc;
33 void dcn10_clear_status_bits(struct dc *dc, unsigned int mask);
35 void dcn10_log_hw_state(struct dc *dc,
38 void dcn10_get_hw_state(struct dc *dc,
/linux/drivers/gpu/drm/amd/display/dc/resource/dce80/
H A Ddce80_resource.h31 struct dc;
36 struct dc *dc);
40 struct dc *dc);
44 struct dc *dc);
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn303/
H A Ddcn303_init.c32 void dcn303_hw_sequencer_construct(struct dc *dc) in dcn303_hw_sequencer_construct() argument
34 dcn30_hw_sequencer_construct(dc); in dcn303_hw_sequencer_construct()
36 dc->hwseq->funcs.dpp_pg_control = dcn303_dpp_pg_control; in dcn303_hw_sequencer_construct()
37 dc->hwseq->funcs.hubp_pg_control = dcn303_hubp_pg_control; in dcn303_hw_sequencer_construct()
38 dc->hwseq->funcs.dsc_pg_control = dcn303_dsc_pg_control; in dcn303_hw_sequencer_construct()
39 dc->hwseq->funcs.enable_power_gating_plane = dcn303_enable_power_gating_plane; in dcn303_hw_sequencer_construct()

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