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Searched refs:cts (Results 1 – 25 of 120) sorted by relevance

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/linux/drivers/crypto/amcc/
H A Dcrypto4xx_sa.h275 get_dynamic_sa_offset_state_ptr_field(struct dynamic_sa_ctl *cts) in get_dynamic_sa_offset_state_ptr_field() argument
279 offset = cts->sa_contents.bf.key_size in get_dynamic_sa_offset_state_ptr_field()
280 + cts->sa_contents.bf.inner_size in get_dynamic_sa_offset_state_ptr_field()
281 + cts->sa_contents.bf.outer_size in get_dynamic_sa_offset_state_ptr_field()
282 + cts->sa_contents.bf.spi in get_dynamic_sa_offset_state_ptr_field()
283 + cts->sa_contents.bf.seq_num0 in get_dynamic_sa_offset_state_ptr_field()
284 + cts->sa_contents.bf.seq_num1 in get_dynamic_sa_offset_state_ptr_field()
285 + cts->sa_contents.bf.seq_num_mask0 in get_dynamic_sa_offset_state_ptr_field()
286 + cts->sa_contents.bf.seq_num_mask1 in get_dynamic_sa_offset_state_ptr_field()
287 + cts->sa_contents.bf.seq_num_mask2 in get_dynamic_sa_offset_state_ptr_field()
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_afmt.c53 int n, cts; in amdgpu_afmt_calc_cts() local
58 cts = clock * 1000; in amdgpu_afmt_calc_cts()
61 div = gcd(n, cts); in amdgpu_afmt_calc_cts()
64 cts /= div; in amdgpu_afmt_calc_cts()
73 cts *= mul; in amdgpu_afmt_calc_cts()
82 *CTS = cts; in amdgpu_afmt_calc_cts()
/linux/samples/bpf/
H A Dcpustat_kern.c106 u64 *cts, *pts, *cstate, *pstate, prev_state, cur_ts, delta; in bpf_prog1() local
116 cts = bpf_map_lookup_elem(&my_map, &key); in bpf_prog1()
117 if (!cts) in bpf_prog1()
138 if (!*cts) { in bpf_prog1()
139 *cts = bpf_ktime_get_ns(); in bpf_prog1()
144 delta = cur_ts - *cts; in bpf_prog1()
145 *cts = cur_ts; in bpf_prog1()
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
16 * card must be disabled and the uart1 rts/cts must be output on other DHCOM
73 * DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
74 * for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
77 cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */
86 * controlled by DHCOM GPIO P. So remove rts/cts pins and the property
121 * M: uart1 cts
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,armada-370-pinctrl.txt26 mpp10 10 gpio, ge0(txctl), uart0(cts), tdm(fsync), audio(sdi)
48 mpp27 27 gpio, ge0(rxd4), ge1(rxd2), uart0(cts)
59 mpp38 38 gpio, dev(ready), uart1(cts), uart0(cts)
73 mpp50 50 gpio, dev(ad11), uart0(cts), sd0(d1), spi1(miso),
82 mpp56 56 gpio, dev(cs2), uart1(cts), uart0(cts), spi0(cs3),
92 mpp62 62 gpio, dev(a2), uart1(cts), tdm(drx), pcie(clkreq0),
93 audio(mclk), uart0(cts)
H A Dmarvell,dove-pinctrl.txt19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
23 uart1(cts), lcd-spi(cs1), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp),
40 mpp17 17 gpio, uart3(cts), sdio0(wp), ac97(sdi2), twsi(sda),
47 uart1(cts), ssp(sfrm)
49 lcd-spi(mosi), uart1(cts), ssp(txd)
H A Dmarvell,kirkwood-pinctrl.txt34 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
43 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
72 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
81 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs)
116 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
125 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
165 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq),
174 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
228 mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), mii(crs),
238 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs),
[all …]
H A Dmarvell,armada-39x-pinctrl.txt23 mpp5 5 gpio, ua1(rxd), ua0(cts), smi(mdio)
37 mpp19 19 gpio, sata1(prsnt) [1], ua0(cts), ua1(rxd), i2c2(sda)
43 mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready)
58 mpp39 39 gpio, i2c1(sck), ua0(cts), sd0(d1), dev(a2), ge(rxd2)
60 mpp41 41 gpio, ua1(rxd), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0), ge(rxctl)
77 mpp55 55 gpio, ua1(cts), spi1(cs1), sd0(d0), ua1(rxd), ua3(rxd)
H A Dmarvell,armada-38x-pinctrl.txt23 mpp5 5 gpio, ge(mdio), ua1(rxd), ua0(cts)
37 mpp19 19 gpio, ge0(col), ptp(evreq), ge0(txerr), sata1(prsnt), ua0(cts)
42 mpp24 24 gpio, spi0(miso), ua0(cts), ua1(rxd), sd0(d4), dev(ready)
57 mpp39 39 gpio, i2c1(sck), ge1(rxd2), ua0(cts), sd0(d1), dev(a2)
59 mpp41 41 gpio, ua1(rxd), ge1(rxctl), ua0(cts), spi1(cs3), dev(burst/last), nand(rb0)
73 mpp55 55 gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)
H A Dmarvell,armada-xp-pinctrl.txt61 mpp40 40 gpio, spi0(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0),
65 mpp42 42 gpio, uart2(rxd), uart0(cts), tdm(int7), tdm(timer)
68 mpp44 44 gpio, uart2(cts), uart3(rxd), spi0(cs4), pcie(clkreq2),
74 mpp47 47 gpio, uart3(cts), uart1(cts), spi0(cs7), pcie(clkreq3),
/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi_common.c52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) in hdmi_compute_acr() argument
57 if (n == NULL || cts == NULL) in hdmi_compute_acr()
146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10); in hdmi_compute_acr()
H A Dhdmi4_core.c534 REG_FLD_MOD(av_base, HDMI_CORE_AV_CTS_SVAL1, cfg->cts, 7, 0); in hdmi_core_audio_config()
536 HDMI_CORE_AV_CTS_SVAL2, cfg->cts >> 8, 7, 0); in hdmi_core_audio_config()
538 HDMI_CORE_AV_CTS_SVAL3, cfg->cts >> 16, 7, 0); in hdmi_core_audio_config()
682 int n, cts, channel_count; in hdmi4_audio_config() local
744 hdmi_compute_acr(pclk, fs_nr, &n, &cts); in hdmi4_audio_config()
748 acore.cts = cts; in hdmi4_audio_config()
/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi_common.c52 int hdmi_compute_acr(u32 pclk, u32 sample_freq, u32 *n, u32 *cts) in hdmi_compute_acr() argument
57 if (n == NULL || cts == NULL) in hdmi_compute_acr()
146 *cts = (pclk/1000) * (*n / 128) * deep_color / (sample_freq / 10); in hdmi_compute_acr()
H A Dhdmi4_core.c489 REG_FLD_MOD(av_base, HDMI_CORE_AV_CTS_SVAL1, cfg->cts, 7, 0); in hdmi_core_audio_config()
491 HDMI_CORE_AV_CTS_SVAL2, cfg->cts >> 8, 7, 0); in hdmi_core_audio_config()
493 HDMI_CORE_AV_CTS_SVAL3, cfg->cts >> 16, 7, 0); in hdmi_core_audio_config()
638 int n, cts, channel_count; in hdmi4_audio_config() local
700 hdmi_compute_acr(pclk, fs_nr, &n, &cts); in hdmi4_audio_config()
704 acore.cts = cts; in hdmi4_audio_config()
/linux/tools/firewire/
H A Ddecode-fcp.c141 uint32_t cts:4; member
186 switch (frame->cts) { in decode_fcp()
206 printf("reserved fcp frame (ctx=0x%02x)\n", frame->cts); in decode_fcp()
/linux/net/sunrpc/
H A DKconfig
/linux/drivers/crypto/intel/keembay/
H A DKconfig17 enabled: ecb(aes), cts(cbc(aes)), ecb(sm4) and cts(cbc(sm4)).
38 Provides OCS version of cts(cbc(aes)) and cts(cbc(sm4)).
/linux/drivers/tty/serial/
H A Dmax3100.c82 int cts; /* last CTS received for flow ctrl */ member
184 int ret = 0, cts; in max3100_handlerx_unlocked() local
213 cts = (rx & MAX3100_CTS) > 0; in max3100_handlerx_unlocked()
214 if (s->cts != cts) { in max3100_handlerx_unlocked()
215 s->cts = cts; in max3100_handlerx_unlocked()
216 uart_handle_cts_change(&s->port, cts); in max3100_handlerx_unlocked()
378 return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR; in max3100_get_mctrl()
H A Dtimbuart.c195 u8 cts = ioread8(port->membase + TIMBUART_CTRL); in timbuart_get_mctrl() local
196 dev_dbg(port->dev, "%s - cts %x\n", __func__, cts); in timbuart_get_mctrl()
198 if (cts & TIMBUART_CTRL_CTS) in timbuart_get_mctrl()
216 unsigned int cts; in timbuart_mctrl_check() local
221 cts = timbuart_get_mctrl(port); in timbuart_mctrl_check()
222 uart_handle_cts_change(port, cts & TIOCM_CTS); in timbuart_mctrl_check()
/linux/arch/arm64/crypto/
H A Daes-neonbs-glue.c59 struct crypto_aes_ctx cts; member
258 err = aes_expandkey(&ctx->cts, in_key, key_len); in aesbs_xts_setkey()
334 neon_aes_xts_encrypt(out, in, ctx->cts.key_enc, in __xts_crypt()
338 neon_aes_xts_decrypt(out, in, ctx->cts.key_dec, in __xts_crypt()
366 neon_aes_xts_encrypt(out, in, ctx->cts.key_enc, in __xts_crypt()
370 neon_aes_xts_decrypt(out, in, ctx->cts.key_dec, in __xts_crypt()
/linux/drivers/spi/
H A Dspi-wpcm-fiu.c100 u8 cts = FIU_UMA_CTS_EXEC_DONE | FIU_UMA_CTS_CS(cs); in wpcm_fiu_do_uma() local
103 cts |= FIU_UMA_CTS_A_SIZE; in wpcm_fiu_do_uma()
105 cts |= FIU_UMA_CTS_WR; in wpcm_fiu_do_uma()
106 cts |= FIU_UMA_CTS_D_SIZE(data_bytes); in wpcm_fiu_do_uma()
108 writeb(cts, fiu->regs + FIU_UMA_CTS); in wpcm_fiu_do_uma()
/linux/net/
H A Dcompat.c231 struct old_timespec32 cts[3]; in put_cmsg_compat() local
253 cts[i].tv_sec = ts[i].tv_sec; in put_cmsg_compat()
254 cts[i].tv_nsec = ts[i].tv_nsec; in put_cmsg_compat()
256 data = &cts; in put_cmsg_compat()
257 len = sizeof(cts[0]) * count; in put_cmsg_compat()
/linux/drivers/mmc/core/
H A Dsdio_uart.c52 __u32 cts; member
474 port->icount.cts++; in sdio_uart_check_modem_status()
477 bool cts = status & UART_MSR_CTS; in sdio_uart_check_modem_status() local
479 if (cts) { in sdio_uart_check_modem_status()
485 if (!cts) { in sdio_uart_check_modem_status()
972 if (port->icount.cts) in sdio_uart_proc_show()
974 port->icount.cts); in sdio_uart_proc_show()
/linux/include/linux/
H A Dserial.h41 __u32 cts, dsr, rng, dcd, tx, rx; member
/linux/drivers/net/wireless/broadcom/b43/
H A Dxmit.c439 struct ieee80211_cts *cts; in b43_generate_txhdr() local
443 cts = (struct ieee80211_cts *) in b43_generate_txhdr()
447 cts = (struct ieee80211_cts *) in b43_generate_txhdr()
451 cts = (struct ieee80211_cts *) in b43_generate_txhdr()
457 info, cts); in b43_generate_txhdr()

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