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Searched refs:clock_table (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu8_hwmgr.c436 struct SMU8_Fusion_ClkTable *clock_table; in smu8_upload_pptable_to_smu() local
461 clock_table = (struct SMU8_Fusion_ClkTable *)table; in smu8_upload_pptable_to_smu()
478 clock_table->SclkBreakdownTable.ClkLevel[i].GnbVid = in smu8_upload_pptable_to_smu()
480 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu()
484 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu()
487 clock_table->SclkBreakdownTable.ClkLevel[i].DfsDid = in smu8_upload_pptable_to_smu()
491 clock_table->SclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu()
495 clock_table->AclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu()
497 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu()
501 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu()
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H A Dsmu10_hwmgr.c498 DpmClocks_t *table = &(smu10_data->clock_table); in smu10_populate_clock_table()
510 &smu10_data->clock_table.DcefClocks[0]); in smu10_populate_clock_table()
513 &smu10_data->clock_table.SocClocks[0]); in smu10_populate_clock_table()
516 &smu10_data->clock_table.FClocks[0]); in smu10_populate_clock_table()
519 &smu10_data->clock_table.MemClocks[0]); in smu10_populate_clock_table()
642 if (min_mclk < data->clock_table.FClocks[0].Freq) in smu10_dpm_force_dpm_level()
643 min_mclk = data->clock_table.FClocks[0].Freq; in smu10_dpm_force_dpm_level()
H A Dprocesspptables.c409 struct phm_clock_array *clock_table; in get_valid_clk() local
411 clock_table = kzalloc_flex(*clock_table, values, table->count); in get_valid_clk()
412 if (!clock_table) in get_valid_clk()
415 clock_table->count = (unsigned long)table->count; in get_valid_clk()
417 for (i = 0; i < clock_table->count; i++) in get_valid_clk()
418 clock_table->values[i] = (unsigned long)table->entries[i].clk; in get_valid_clk()
420 *ptable = clock_table; in get_valid_clk()
H A Dsmu10_hwmgr.h297 DpmClocks_t clock_table; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_dpmm/
H A Ddml2_dpmm_dcn4.c277 …pm(unsigned long min_value, unsigned long *rounded_value, const struct dml2_clk_table *clock_table) in round_up_and_copy_to_next_dpm() argument
294 if (clock_table->num_clk_values == 0) { in round_up_and_copy_to_next_dpm()
302 if (clock_table->num_clk_values > 2) { in round_up_and_copy_to_next_dpm()
303 while (index < clock_table->num_clk_values && clock_table->clk_values_khz[index] < min_value) in round_up_and_copy_to_next_dpm()
306 if (index < clock_table->num_clk_values) { in round_up_and_copy_to_next_dpm()
307 *rounded_value = clock_table->clk_values_khz[index]; in round_up_and_copy_to_next_dpm()
310 } else if (clock_table->clk_values_khz[clock_table->num_clk_values - 1] >= min_value) { in round_up_and_copy_to_next_dpm()
317 …tic bool round_up_to_next_dpm(unsigned long *clock_value, const struct dml2_clk_table *clock_table) in round_up_to_next_dpm() argument
319 return round_up_and_copy_to_next_dpm(*clock_value, clock_value, clock_table); in round_up_to_next_dpm()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c1582 static int smu_14_0_1_get_dpm_table(struct smu_context *smu, struct dpm_clocks *clock_table) in smu_14_0_1_get_dpm_table() argument
1589 …clock_table->SocClocks[idx].Freq = (idx < clk_table->NumSocClkLevelsEnabled) ? clk_table->SocClock… in smu_14_0_1_get_dpm_table()
1590 clock_table->SocClocks[idx].Vol = 0; in smu_14_0_1_get_dpm_table()
1594 …clock_table->VPEClocks[idx].Freq = (idx < clk_table->VpeClkLevelsEnabled) ? clk_table->VPEClocks[i… in smu_14_0_1_get_dpm_table()
1595 clock_table->VPEClocks[idx].Vol = 0; in smu_14_0_1_get_dpm_table()
1601 static int smu_14_0_0_get_dpm_table(struct smu_context *smu, struct dpm_clocks *clock_table) in smu_14_0_0_get_dpm_table() argument
1608 …clock_table->SocClocks[idx].Freq = (idx < clk_table->NumSocClkLevelsEnabled) ? clk_table->SocClock… in smu_14_0_0_get_dpm_table()
1609 clock_table->SocClocks[idx].Vol = 0; in smu_14_0_0_get_dpm_table()
1613 …clock_table->VPEClocks[idx].Freq = (idx < clk_table->VpeClkLevelsEnabled) ? clk_table->VPEClocks[i… in smu_14_0_0_get_dpm_table()
1614 clock_table->VPEClocks[idx].Vol = 0; in smu_14_0_0_get_dpm_table()
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/linux/drivers/gpu/drm/amd/display/dc/
H A Ddm_pp_smu.h286 struct dpm_clocks *clock_table);
306 struct dpm_clocks *clock_table);
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vpe.c127 struct dpm_clocks clock_table = { 0 }; in amdgpu_vpe_configure_dpm() local
140 if (amdgpu_dpm_get_dpm_clock_table(adev, &clock_table)) { in amdgpu_vpe_configure_dpm()
145 SOCClks = clock_table.SocClocks; in amdgpu_vpe_configure_dpm()
146 VPEClks = clock_table.VPEClocks; in amdgpu_vpe_configure_dpm()
/linux/drivers/usb/serial/
H A Df81232.c127 static u8 const clock_table[] = { F81232_CLK_1_846_MHZ, F81232_CLK_14_77_MHZ, variable
519 F81232_CLK_MASK, clock_table[idx]); in f81232_set_baudrate()
H A Df81534.c190 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, variable
586 port_priv->shadow_clk |= clock_table[idx]; in f81534_set_port_config()
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h1108 int (*get_dpm_clock_table)(struct smu_context *smu, struct dpm_clocks *clock_table);