Searched refs:c20 (Results 1 – 4 of 4) sorted by relevance
787 const struct intel_c20pll_state *c20; member804 .c20 = &__state, \2040 return c20pll_state_is_dp(&pll_state->c20); in cx0pll_state_is_dp()2626 int clock = intel_c20pll_calc_port_clock(tables[i].c20); in intel_c20_pll_find_table()2646 pll_state->c20 = *table->c20; in intel_c20pll_calc_state_from_table()2675 &hw_state->cx0pll.c20); in intel_c20pll_calc_state()2680 intel_c20_calc_vdr_params(&hw_state->cx0pll.c20.vdr, in intel_c20pll_calc_state()2683 drm_WARN_ON(display->drm, is_dp != c20pll_state_is_dp(&hw_state->cx0pll.c20)); in intel_c20pll_calc_state()2702 struct intel_c20pll_state *pll_state = &cx0pll_state->c20; in intel_c20pll_readout_hw_state()2814 intel_c20pll_dump_hw_state(p, &hw_state->c20); in intel_cx0pll_dump_hw_state()[all …]
128 tristate "OnSpec 90c20 protocol"131 This option enables support for the (obsolete) 90c20 parallel port
129 pd_tv: power-domain@10023c20 {
672 c20 msgfi RIL_RI