Home
last modified time | relevance | path

Searched refs:array_mode (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dr600_cs.c239 int array_mode; member
261 switch (values->array_mode) { in r600_get_array_mode_alignment()
357 unsigned array_mode; in r600_cs_track_validate_cb() local
376 array_mode = G_0280A0_ARRAY_MODE(track->cb_color_info[i]); in r600_cs_track_validate_cb()
379 array_check.array_mode = array_mode; in r600_cs_track_validate_cb()
392 switch (array_mode) { in r600_cs_track_validate_cb()
413 __func__, __LINE__, pitch, pitch_align, array_mode); in r600_cs_track_validate_cb()
418 __func__, __LINE__, height, height_align, array_mode); in r600_cs_track_validate_cb()
424 base_offset, base_align, array_mode); in r600_cs_track_validate_cb()
431 switch (array_mode) { in r600_cs_track_validate_cb()
[all …]
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c220 tiling_info->gfx8.array_mode = DC_ARRAY_LINEAR_GENERAL; in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
232 tiling_info->gfx8.array_mode = AMD_FMT_MOD_GET(TILE, modifier); in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
600 u32 array_mode, micro_tile_mode, tile_split_bytes; in amdgpu_dm_plane_calc_gfx6_mod() local
615 array_mode = (gb_tile_mode >> 2) & 0xf; in amdgpu_dm_plane_calc_gfx6_mod()
625 ASSERT(array_mode == arr); in amdgpu_dm_plane_calc_gfx6_mod()
663 const u32 array_mode = AMD_FMT_MOD_GET(TILE, modifier); in amdgpu_dm_plane_gfx6_format_mod_supported() local
685 if (array_mode != AMD_FMT_MOD_TILE_GFX6_1D_TILED_THIN1 && in amdgpu_dm_plane_gfx6_format_mod_supported()
686 array_mode != AMD_FMT_MOD_TILE_GFX6_2D_TILED_THIN1) in amdgpu_dm_plane_gfx6_format_mod_supported()
698 return amdgpu_dm_plane_calc_gfx6_mod(adev, bpp, array_mode) == modifier; in amdgpu_dm_plane_gfx6_format_mod_supported()