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Searched refs:WR_CONFIRM (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvid.h151 #define WR_CONFIRM (1 << 20) macro
H A Dgfx_v9_4_3.c381 (wc ? WR_CONFIRM : 0)); in gfx_v9_4_3_write_data_to_reg()
474 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_4_3_ring_test_ib()
3079 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_4_3_ring_emit_fence_kiq()
3088 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_4_3_ring_emit_fence_kiq()
3123 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v9_4_3_ring_emit_wreg()
3129 cmd = WR_CONFIRM; in gfx_v9_4_3_ring_emit_wreg()
H A Dgfx_v9_0.c1166 (wc ? WR_CONFIRM : 0)); in gfx_v9_0_write_data_to_reg()
1248 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_0_ring_test_ib()
5719 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5728 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5758 WR_CONFIRM) | in gfx_v9_0_ring_emit_ce_meta()
5856 WR_CONFIRM) | in gfx_v9_0_ring_emit_de_meta()
5951 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
5957 cmd = WR_CONFIRM; in gfx_v9_0_ring_emit_wreg()
7238 cmd = WR_CONFIRM; in gfx_v9_0_ring_emit_wreg_me()
H A Dgfx_v11_0.c538 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v11_0_write_data_to_reg()
654 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v11_0_ring_test_ib()
6160 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v11_0_ring_emit_fence_kiq()
6169 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v11_0_ring_emit_fence_kiq()
6265 amdgpu_ring_write(ring, WRITE_DATA_DST_SEL(5) | WR_CONFIRM); in gfx_v11_0_ring_emit_gfx_shadow()
6327 WR_CONFIRM) | in gfx_v11_0_ring_emit_de_meta()
6373 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v11_0_ring_emit_wreg()
6379 cmd = WR_CONFIRM; in gfx_v11_0_ring_emit_wreg()
H A Dgfx_v8_0.c892 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v8_0_ring_test_ib()
6169 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6178 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6264 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()
6270 cmd = WR_CONFIRM; in gfx_v8_0_ring_emit_wreg()
7076 WR_CONFIRM) | in gfx_v8_0_ring_emit_ce_meta()
7109 WR_CONFIRM) | in gfx_v8_0_ring_emit_de_meta()
H A Dgfx_v12_0.c526 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v12_0_ring_test_ib()
4641 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v12_0_ring_emit_fence_kiq()
4650 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v12_0_ring_emit_fence_kiq()
4719 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v12_0_ring_emit_wreg()
4725 cmd = WR_CONFIRM; in gfx_v12_0_ring_emit_wreg()
H A Dgfx_v10_0.c4005 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v10_0_write_data_to_reg()
4098 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v10_0_ring_test_ib()
8797 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
8806 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
8934 WR_CONFIRM) | in gfx_v10_0_ring_emit_ce_meta()
8970 WR_CONFIRM) | in gfx_v10_0_ring_emit_de_meta()
9016 cmd = WRITE_DATA_ENGINE_SEL(1) | WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
9022 cmd = WR_CONFIRM; in gfx_v10_0_ring_emit_wreg()
/linux/drivers/gpu/drm/radeon/
H A Dcikd.h1737 #define WR_CONFIRM (1 << 20) macro