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Searched refs:UVD_CGC_CTRL__SCPU_MODE_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h463 #define UVD_CGC_CTRL__SCPU_MODE_MASK macro
H A Duvd_3_1_sh_mask.h265 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000 macro
H A Duvd_4_2_sh_mask.h265 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000 macro
H A Duvd_4_0_sh_mask.h58 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000L macro
H A Duvd_5_0_sh_mask.h287 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000 macro
H A Duvd_6_0_sh_mask.h289 #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v1_0.c566 | UVD_CGC_CTRL__SCPU_MODE_MASK); in vcn_v1_0_disable_clock_gating()
666 | UVD_CGC_CTRL__SCPU_MODE_MASK); in vcn_v1_0_enable_clock_gating()
724 UVD_CGC_CTRL__SCPU_MODE_MASK); in vcn_v1_0_clock_gating_dpg_mode()
H A Dvcn_v2_0.c592 | UVD_CGC_CTRL__SCPU_MODE_MASK); in vcn_v2_0_disable_clock_gating()
668 UVD_CGC_CTRL__SCPU_MODE_MASK); in vcn_v2_0_clock_gating_dpg_mode()
729 | UVD_CGC_CTRL__SCPU_MODE_MASK); in vcn_v2_0_enable_clock_gating()
H A Duvd_v5_0.c715 UVD_CGC_CTRL__SCPU_MODE_MASK); in uvd_v5_0_set_sw_clock_gating()
H A Duvd_v6_0.c1372 UVD_CGC_CTRL__SCPU_MODE_MASK | in uvd_v6_0_set_sw_clock_gating()
/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h956 #define UVD_CGC_CTRL__SCPU_MODE_MASK macro
H A Dvcn_2_0_0_sh_mask.h1975 #define UVD_CGC_CTRL__SCPU_MODE_MASK macro