| /linux/drivers/gpu/drm/i915/gvt/ |
| H A D | display.c | 74 if (!(vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_EDP)) & TRANSCONF_ENABLE)) in edp_pipe_is_enabled()
91 if (vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) & TRANSCONF_ENABLE) in pipe_is_enabled()
200 vgpu_vreg_t(vgpu, TRANSCONF(display, pipe)) &= in emulate_monitor_status_change()
261 vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_ENABLE; in emulate_monitor_status_change()
262 vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_STATE_ENABLE; in emulate_monitor_status_change()
522 vgpu_vreg_t(vgpu, TRANSCONF(display, TRANSCODER_A)) |= TRANSCONF_ENABLE; in emulate_monitor_status_change()
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| H A D | handlers.c | 2288 MMIO_DH(TRANSCONF(display, TRANSCODER_A), D_ALL, NULL, in init_generic_mmio_info()
2290 MMIO_DH(TRANSCONF(display, TRANSCODER_B), D_ALL, NULL, in init_generic_mmio_info()
2292 MMIO_DH(TRANSCONF(display, TRANSCODER_C), D_ALL, NULL, in init_generic_mmio_info()
2294 MMIO_DH(TRANSCONF(display, TRANSCODER_EDP), D_ALL, NULL, in init_generic_mmio_info()
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_pch_display.c | 280 pipeconf_val = intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)); in ilk_enable_pch_transcoder()
423 u32 bpc = (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) >> 5; in ilk_pch_enable()
568 TRANSCONF(dev_priv, cpu_transcoder)); in lpt_enable_pch_transcoder()
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| H A D | intel_crt.c | 742 TRANSCONF(display, cpu_transcoder)); in intel_crt_load_detect()
744 intel_de_write(display, TRANSCONF(display, cpu_transcoder), in intel_crt_load_detect()
747 TRANSCONF(display, cpu_transcoder)); in intel_crt_load_detect()
756 intel_de_write(display, TRANSCONF(display, cpu_transcoder), in intel_crt_load_detect()
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| H A D | intel_fdi.c | 1047 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_pll_enable()
1103 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1129 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
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| H A D | icl_dsi.c | 1029 intel_de_rmw(display, TRANSCONF(display, dsi_trans), 0, in gen11_dsi_enable_transcoder()
1033 if (intel_de_wait_for_set(display, TRANSCONF(display, dsi_trans), in gen11_dsi_enable_transcoder()
1296 intel_de_rmw(display, TRANSCONF(display, dsi_trans), in gen11_dsi_disable_transcoder()
1300 if (intel_de_wait_for_clear(display, TRANSCONF(display, dsi_trans), in gen11_dsi_disable_transcoder()
1735 tmp = intel_de_read(display, TRANSCONF(display, dsi_trans)); in gen11_dsi_get_hw_state()
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| H A D | intel_display_power_well.c | 1067 if ((intel_de_read(display, TRANSCONF(display, PIPE_A)) & TRANSCONF_ENABLE) == 0) in i830_pipes_power_well_enable()
1069 if ((intel_de_read(display, TRANSCONF(display, PIPE_B)) & TRANSCONF_ENABLE) == 0) in i830_pipes_power_well_enable()
1083 return intel_de_read(display, TRANSCONF(display, PIPE_A)) & TRANSCONF_ENABLE && in i830_pipes_power_well_enabled()
1084 intel_de_read(display, TRANSCONF(display, PIPE_B)) & TRANSCONF_ENABLE; in i830_pipes_power_well_enabled()
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| H A D | intel_drrs.c | 92 intel_de_rmw(dev_priv, TRANSCONF(dev_priv, cpu_transcoder), in intel_drrs_set_refresh_rate_pipeconf()
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| H A D | vlv_dsi.c | 977 TRANSCONF(dev_priv, PIPE_B)) & TRANSCONF_ENABLE; in intel_dsi_get_hw_state()
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| /linux/drivers/gpu/drm/i915/ |
| H A D | intel_gvt_mmio_table.c | 135 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_A)); in iterate_generic_mmio()
136 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_B)); in iterate_generic_mmio()
137 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_C)); in iterate_generic_mmio()
138 MMIO_D(TRANSCONF(dev_priv, TRANSCODER_EDP)); in iterate_generic_mmio()
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| H A D | i915_reg.h | 1530 #define TRANSCONF(dev_priv, trans) _MMIO_PIPE2(dev_priv, (trans), _TRANSACONF) macro
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