Searched refs:RAP (Results 1 – 4 of 4) sorted by relevance
| /linux/Documentation/admin-guide/hw-vuln/ |
| H A D | cross-thread-rsb.rst | 46 In affected processors, the return address predictor (RAP) is partitioned 48 16-entry RAP, but in 1T mode, the active thread uses a 32-entry RAP. Upon 49 transition between 1T/2T mode, the RAP contents are not modified but the RAP 69 context switch fills the RAP entries (referred to as the RSB in Linux) with safe
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| H A D | rsb.rst | 14 Return Address Predictor (RAP) on AMD). 94 their predicted targets from the Return Address Predictor (RAP). 95 AMD recommends software use a RAP stuffing sequence (mitigation 97 to ensure that the addresses in the RAP are safe for 98 speculation. Collectively, we refer to these mitigations as "RAP
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| /linux/drivers/net/ethernet/amd/ |
| H A D | sunlance.c | 273 #define RAP 0x02UL /* register address port */ macro 278 sbus_writew(LE_CSR0, __base + RAP); \ 304 sbus_writew(LE_CSR1, lp->lregs + RAP); in load_csrs() 306 sbus_writew(LE_CSR2, lp->lregs + RAP); in load_csrs() 308 sbus_writew(LE_CSR3, lp->lregs + RAP); in load_csrs() 312 sbus_writew(LE_CSR0, lp->lregs + RAP); in load_csrs() 470 sbus_writew(LE_CSR0, lp->lregs + RAP); in init_restart_lance() 816 sbus_writew(LE_CSR0, lp->lregs + RAP); in lance_interrupt()
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| H A D | ariadne.h | 47 volatile u_short RAP; /* Register Address Port */ member
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