Home
last modified time | relevance | path

Searched refs:PORT_CLK_SEL (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/i915/gvt/
H A Ddisplay.c430 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) &= in emulate_monitor_status_change()
432 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_B)) |= in emulate_monitor_status_change()
456 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_C)) &= in emulate_monitor_status_change()
458 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_C)) |= in emulate_monitor_status_change()
482 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) &= in emulate_monitor_status_change()
484 vgpu_vreg_t(vgpu, PORT_CLK_SEL(PORT_D)) |= in emulate_monitor_status_change()
H A Dhandlers.c472 u32 ddi_pll_sel = vgpu_vreg_t(vgpu, PORT_CLK_SEL(port)); in bdw_vgpu_get_dp_bitrate()
536 vgpu->id, port_name(port), vgpu_vreg_t(vgpu, PORT_CLK_SEL(port))); in bdw_vgpu_get_dp_bitrate()
/linux/drivers/gpu/drm/i915/
H A Dintel_gvt_mmio_table.c492 MMIO_D(PORT_CLK_SEL(PORT_A)); in iterate_generic_mmio()
493 MMIO_D(PORT_CLK_SEL(PORT_B)); in iterate_generic_mmio()
494 MMIO_D(PORT_CLK_SEL(PORT_C)); in iterate_generic_mmio()
495 MMIO_D(PORT_CLK_SEL(PORT_D)); in iterate_generic_mmio()
496 MMIO_D(PORT_CLK_SEL(PORT_E)); in iterate_generic_mmio()
H A Di915_reg.h3750 #define PORT_CLK_SEL(port) _MMIO_PORT(port, _PORT_CLK_SEL_A, _PORT_CLK_SEL_B) macro
3762 #define DDI_CLK_SEL(port) PORT_CLK_SEL(port)
/linux/drivers/gpu/drm/i915/display/
H A Dintel_ddi.c1989 intel_de_write(i915, PORT_CLK_SEL(port), hsw_pll_to_ddi_pll_sel(pll)); in hsw_ddi_enable_clock()
1997 intel_de_write(i915, PORT_CLK_SEL(port), PORT_CLK_SEL_NONE); in hsw_ddi_disable_clock()
2005 return intel_de_read(i915, PORT_CLK_SEL(port)) != PORT_CLK_SEL_NONE; in hsw_ddi_is_clock_enabled()
2015 tmp = intel_de_read(i915, PORT_CLK_SEL(port)); in hsw_ddi_get_pll()