Searched refs:PCI_PM_CTRL_STATE_MASK (Results 1 – 11 of 11) sorted by relevance
387 catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D3hot); in catpt_dsp_power_down()411 catpt_updatel_pci(cdev, PMCS, PCI_PM_CTRL_STATE_MASK, (__force u32)PCI_D0); in catpt_dsp_power_up()
125 new_state = (__force pci_power_t)(new_value & PCI_PM_CTRL_STATE_MASK); in pm_ctrl_write()
353 dev->current_state = (pci_power_t __force)(pmcsr & PCI_PM_CTRL_STATE_MASK); in mid_power_off_one_device()
1150 dev->current_state = pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_update_current_state()1329 state = pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_power_up()1384 dev->current_state = pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_set_full_power_state()1498 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in pci_set_low_power_state()1511 dev->current_state = pmcsr & PCI_PM_CTRL_STATE_MASK; in pci_set_low_power_state()4479 csr &= ~PCI_PM_CTRL_STATE_MASK; in pci_pm_reset()4484 csr &= ~PCI_PM_CTRL_STATE_MASK; in pci_pm_reset()
263 #define PCI_PM_CTRL_STATE_MASK 0x0003 /* Current power state (D0 to D3) */ macro
585 d3_state = ((pmcsr & PCI_PM_CTRL_STATE_MASK) == in telem_soc_states_show()
3196 ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) | in bnx2x_set_power_state()3199 if (pmcsr & PCI_PM_CTRL_STATE_MASK) in bnx2x_set_power_state()3213 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; in bnx2x_set_power_state()
831 if (tmp & PCI_PM_CTRL_STATE_MASK) { in natsemi_probe1()833 u32 newtmp = tmp & ~PCI_PM_CTRL_STATE_MASK; in natsemi_probe1()
2528 pwr_cmd = (pwr_cmd & ~PCI_PM_CTRL_STATE_MASK) | state; in radeonfb_whack_power_state()
3145 data &= ~PCI_PM_CTRL_STATE_MASK; in hw_cfg_wol_pme()
16596 pm_reg &= ~PCI_PM_CTRL_STATE_MASK; in tg3_get_invariants()