Searched refs:I915_MAX_PIPES (Results 1 – 8 of 8) sorted by relevance
518 u32 de_pipe_imr_mask[I915_MAX_PIPES];519 u32 pipestat_irq_mask[I915_MAX_PIPES];524 u16 linetime[I915_MAX_PIPES];525 bool disable[I915_MAX_PIPES];606 u32 chv_dpll_md[I915_MAX_PIPES];
20 struct drm_dp_tunnel_ref ref[I915_MAX_PIPES];509 drm_WARN_ON(display->drm, pipe_mask & ~((1 << I915_MAX_PIPES) - 1)); in intel_dp_tunnel_atomic_add_group_state()
20 struct intel_dbuf_bw dbuf_bw[I915_MAX_PIPES];
422 u32 dpll[I915_MAX_PIPES]; in intel_dvo_init_dev()
533 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i9xx_pipestat_irq_ack() argument600 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i915_pipestat_irq_handler() argument624 u32 iir, u32 pipe_stats[I915_MAX_PIPES]) in i965_pipestat_irq_handler() argument651 u32 pipe_stats[I915_MAX_PIPES]) in valleyview_pipestat_irq_handler() argument
1882 struct intel_dp_mst_encoder *stream_encoders[I915_MAX_PIPES];
7013 struct skl_ddb_entry entries[I915_MAX_PIPES] = {}; in skl_commit_modeset_enables()7065 entries, I915_MAX_PIPES, pipe)) in skl_commit_modeset_enables()7154 entries, I915_MAX_PIPES, pipe)); in skl_commit_modeset_enables()7441 struct intel_power_domain_mask put_domains[I915_MAX_PIPES] = {}; in intel_atomic_commit_tail()
140 int min_cdclk[I915_MAX_PIPES];142 u8 min_voltage_level[I915_MAX_PIPES];