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Searched refs:HSW_PWR_WELL_CTL_REQ (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_power_well.c295 u32 req_mask = HSW_PWR_WELL_CTL_REQ(pw_idx); in hsw_power_well_requesters()
372 intel_de_rmw(display, regs->driver, 0, HSW_PWR_WELL_CTL_REQ(pw_idx)); in hsw_power_well_enable()
398 intel_de_rmw(display, regs->driver, HSW_PWR_WELL_CTL_REQ(pw_idx), 0); in hsw_power_well_disable()
418 intel_de_rmw(display, regs->driver, 0, HSW_PWR_WELL_CTL_REQ(pw_idx)); in icl_combo_phy_aux_power_well_enable()
452 intel_de_rmw(display, regs->driver, HSW_PWR_WELL_CTL_REQ(pw_idx), 0); in icl_combo_phy_aux_power_well_disable()
524 HSW_PWR_WELL_CTL_REQ(i915_power_well_instance(power_well)->hsw.idx)); in icl_tc_phy_aux_power_well_enable()
592 u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx) | in hsw_power_well_enabled()
624 HSW_PWR_WELL_CTL_REQ(SKL_PW_CTL_IDX_PW_2), in assert_can_enable_dc9()
904 u32 mask = HSW_PWR_WELL_CTL_REQ(pw_idx); in hsw_power_well_sync_hw()
/linux/drivers/gpu/drm/i915/
H A Di915_reg.h3391 #define HSW_PWR_WELL_CTL_REQ(pw_idx) (0x2 << ((pw_idx) * 2)) macro
/linux/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c1598 HSW_PWR_WELL_CTL_REQ(HSW_PW_CTL_IDX_GLOBAL)) in power_well_ctl_mmio_write()