Searched refs:GG2_PCI_CC_CTRL (Results 1 – 2 of 2) sorted by relevance
47 #define GG2_PCI_CC_CTRL 0x80 /* Cache controller control register */ macro
149 t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL); in chrp_show_cpuinfo()