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Searched refs:FIELD_GET (Results 1 – 25 of 766) sorted by relevance

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/linux/drivers/ras/amd/atl/
H A Ddehash.c23 hashed_bit ^= FIELD_GET(BIT_ULL(12), ctx->ret_addr); in df2_dehash_addr()
24 hashed_bit ^= FIELD_GET(BIT_ULL(18), ctx->ret_addr); in df2_dehash_addr()
25 hashed_bit ^= FIELD_GET(BIT_ULL(21), ctx->ret_addr); in df2_dehash_addr()
26 hashed_bit ^= FIELD_GET(BIT_ULL(30), ctx->ret_addr); in df2_dehash_addr()
39 hash_ctl_64k = FIELD_GET(DF3_HASH_CTL_64K, ctx->map.ctl); in df3_dehash_addr()
40 hash_ctl_2M = FIELD_GET(DF3_HASH_CTL_2M, ctx->map.ctl); in df3_dehash_addr()
41 hash_ctl_1G = FIELD_GET(DF3_HASH_CTL_1G, ctx->map.ctl); in df3_dehash_addr()
47 hashed_bit ^= FIELD_GET(BIT_ULL(14), ctx->ret_addr); in df3_dehash_addr()
48 hashed_bit ^= FIELD_GET(BIT_ULL(18), ctx->ret_addr) & hash_ctl_64k; in df3_dehash_addr()
49 hashed_bit ^= FIELD_GET(BIT_ULL(23), ctx->ret_addr) & hash_ctl_2M; in df3_dehash_addr()
[all …]
H A Dmap.c17 ctx->map.intlv_mode = FIELD_GET(DF2_INTLV_NUM_CHAN, ctx->map.base); in df2_get_intlv_mode()
32 ctx->map.intlv_mode = FIELD_GET(DF3_INTLV_NUM_CHAN, ctx->map.base); in df3_get_intlv_mode()
38 ctx->map.intlv_mode = FIELD_GET(DF3p5_INTLV_NUM_CHAN, ctx->map.base); in df3p5_get_intlv_mode()
48 ctx->map.intlv_mode = FIELD_GET(DF4_INTLV_NUM_CHAN, ctx->map.intlv); in df4_get_intlv_mode()
61 ctx->map.intlv_mode = FIELD_GET(DF4p5_INTLV_NUM_CHAN, ctx->map.intlv); in df4p5_get_intlv_mode()
117 hi_addr_offset = FIELD_GET(DF2_HI_ADDR_OFFSET, reg_dram_offset); in get_hi_addr_offset()
121 hi_addr_offset = FIELD_GET(DF3_HI_ADDR_OFFSET, reg_dram_offset); in get_hi_addr_offset()
125 hi_addr_offset = FIELD_GET(DF4_HI_ADDR_OFFSET, reg_dram_offset); in get_hi_addr_offset()
174 if (!FIELD_GET(DF_HI_ADDR_OFFSET_EN, reg_dram_offset)) in get_dram_offset()
184 u16 dst_fabric_id = FIELD_GET(DF3_DST_FABRIC_I in df3_6ch_get_dram_addr_map()
[all...]
/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_regs.h41 FIELD_GET(AFI_PORT_FRM_OUT_FRM_OUT_CNT, x)
50 FIELD_GET(AFI_PORT_CFG_FC_SKIP_TTI_INJ, x)
56 FIELD_GET(AFI_PORT_CFG_FRM_OUT_MAX, x)
65 FIELD_GET(ANA_ADVLEARN_VLAN_CHK, x)
77 FIELD_GET(ANA_ANAINTR_INTR, x)
83 FIELD_GET(ANA_ANAINTR_INTR_ENA, x)
92 FIELD_GET(ANA_AUTOAGE_AGE_PERIOD, x)
101 FIELD_GET(ANA_MIRRORPORTS_MIRRORPORTS, x)
110 FIELD_GET(ANA_EMIRRORPORTS_EMIRRORPORTS, x)
119 FIELD_GET(ANA_FLOODING_FLD_UNICAST, x)
[all …]
/linux/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_main_regs.h85 FIELD_GET(ANA_AC_RAM_INIT_RAM_INIT, x)
91 FIELD_GET(ANA_AC_RAM_INIT_RAM_CFG_HOOK, x)
102 FIELD_GET(ANA_AC_OWN_UPSID_OWN_UPSID, x)
113 FIELD_GET(ANA_AC_PROBE_CFG_PROBE_RX_CPU_AND_VD, x)
119 FIELD_GET(ANA_AC_PROBE_CFG_PROBE_CPU_SET, x)
125 FIELD_GET(ANA_AC_PROBE_CFG_PROBE_VID, x)
131 FIELD_GET(ANA_AC_PROBE_CFG_PROBE_VLAN_MODE, x)
137 FIELD_GET(ANA_AC_PROBE_CFG_PROBE_MAC_MODE, x)
143 FIELD_GET(ANA_AC_PROBE_CFG_PROBE_DIRECTION, x)
166 FIELD_GET(ANA_AC_PROBE_PORT_CFG2_PROBE_PORT_MASK2, x)
[all …]
/linux/drivers/phy/microchip/
H A Dlan966x_serdes_regs.h24 FIELD_GET(HSIO_SD_CFG_PHY_RESET, x)
30 FIELD_GET(HSIO_SD_CFG_TX_RESET, x)
36 FIELD_GET(HSIO_SD_CFG_TX_RATE, x)
42 FIELD_GET(HSIO_SD_CFG_TX_INVERT, x)
48 FIELD_GET(HSIO_SD_CFG_TX_EN, x)
54 FIELD_GET(HSIO_SD_CFG_TX_DATA_EN, x)
60 FIELD_GET(HSIO_SD_CFG_TX_CM_EN, x)
66 FIELD_GET(HSIO_SD_CFG_LANE_10BIT_SEL, x)
72 FIELD_GET(HSIO_SD_CFG_RX_TERM_EN, x)
78 FIELD_GET(HSIO_SD_CFG_RX_RESET, x)
[all …]
/linux/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_debugfs.c44 head = FIELD_GET(FBNIC_QUEUE_TWQ_PTRS_HEAD_MASK, tail); in fbnic_dbg_ring_show()
48 head = FIELD_GET(FBNIC_QUEUE_TWQ_PTRS_HEAD_MASK, tail); in fbnic_dbg_ring_show()
52 tail = FIELD_GET(FBNIC_QUEUE_TCQ_PTRS_TAIL_MASK, head); in fbnic_dbg_ring_show()
56 head = FIELD_GET(FBNIC_QUEUE_BDQ_PTRS_HEAD_MASK, tail); in fbnic_dbg_ring_show()
60 head = FIELD_GET(FBNIC_QUEUE_BDQ_PTRS_HEAD_MASK, tail); in fbnic_dbg_ring_show()
64 tail = FIELD_GET(FBNIC_QUEUE_RCQ_PTRS_TAIL_MASK, head); in fbnic_dbg_ring_show()
81 switch (FIELD_GET(FBNIC_TWD_TYPE_MASK, twd)) { in fbnic_dbg_twd_desc_seq_show()
84 i, FIELD_GET(FBNIC_TWD_LEN_MASK, twd), in fbnic_dbg_twd_desc_seq_show()
85 FIELD_GET(FBNIC_TWD_TYPE_MASK, twd), in fbnic_dbg_twd_desc_seq_show()
86 FIELD_GET(FBNIC_TWD_FLAG_REQ_COMPLETION, twd), in fbnic_dbg_twd_desc_seq_show()
[all …]
/linux/drivers/net/ethernet/marvell/prestera/
H A Dprestera_dsa.c47 cmd = (enum prestera_dsa_cmd)FIELD_GET(PRESTERA_DSA_W0_CMD, words[0]); in prestera_dsa_parse()
53 if (FIELD_GET(PRESTERA_DSA_W0_EXT_BIT, words[0]) == 0) in prestera_dsa_parse()
55 if (FIELD_GET(PRESTERA_DSA_W1_EXT_BIT, words[1]) == 0) in prestera_dsa_parse()
57 if (FIELD_GET(PRESTERA_DSA_W2_EXT_BIT, words[2]) == 0) in prestera_dsa_parse()
60 field = FIELD_GET(PRESTERA_DSA_W3_VID, words[3]); in prestera_dsa_parse()
62 dsa->vlan.is_tagged = FIELD_GET(PRESTERA_DSA_W0_IS_TAGGED, words[0]); in prestera_dsa_parse()
63 dsa->vlan.cfi_bit = FIELD_GET(PRESTERA_DSA_W1_CFI_BIT, words[1]); in prestera_dsa_parse()
64 dsa->vlan.vpt = FIELD_GET(PRESTERA_DSA_W0_VPT, words[0]); in prestera_dsa_parse()
65 dsa->vlan.vid = FIELD_GET(PRESTERA_DSA_W0_VID, words[0]); in prestera_dsa_parse()
69 field = FIELD_GET(PRESTERA_DSA_W3_DEV_NUM, words[3]); in prestera_dsa_parse()
[all …]
/linux/sound/soc/intel/keembay/
H A Dkmb_platform.h71 #define COMP1_TX_WORDSIZE_3(r) FIELD_GET(GENMASK(27, 25), (r))
72 #define COMP1_TX_WORDSIZE_2(r) FIELD_GET(GENMASK(24, 22), (r))
73 #define COMP1_TX_WORDSIZE_1(r) FIELD_GET(GENMASK(21, 19), (r))
74 #define COMP1_TX_WORDSIZE_0(r) FIELD_GET(GENMASK(18, 16), (r))
75 #define COMP1_RX_ENABLED(r) FIELD_GET(BIT(6), (r))
76 #define COMP1_TX_ENABLED(r) FIELD_GET(BIT(5), (r))
77 #define COMP1_MODE_EN(r) FIELD_GET(BIT(4), (r))
78 #define COMP1_APB_DATA_WIDTH(r) FIELD_GET(GENMASK(1, 0), (r))
79 #define COMP2_RX_WORDSIZE_3(r) FIELD_GET(GENMASK(12, 10), (r))
80 #define COMP2_RX_WORDSIZE_2(r) FIELD_GET(GENMASK(9, 7), (r))
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_parser.c238 bm->alu0 = FIELD_GET(ICE_IM_BM_ALU0, data); in ice_imem_bm_init()
239 bm->alu1 = FIELD_GET(ICE_IM_BM_ALU1, data); in ice_imem_bm_init()
240 bm->alu2 = FIELD_GET(ICE_IM_BM_ALU2, data); in ice_imem_bm_init()
241 bm->pg = FIELD_GET(ICE_IM_BM_PG, data); in ice_imem_bm_init()
254 bkb->prio = FIELD_GET(ICE_IM_BKB_PRIO, data); in ice_imem_bkb_init()
255 bkb->tsr_ctrl = FIELD_GET(ICE_IM_BKB_TSR_CTRL, data); in ice_imem_bkb_init()
269 kb->opc = FIELD_GET(ICE_IM_NPKB_OPC, data); in ice_imem_npkb_init()
270 kb->start_reg0 = FIELD_GET(ICE_IM_NPKB_S_R0, data); in ice_imem_npkb_init()
271 kb->len_reg1 = FIELD_GET(ICE_IM_NPKB_L_R1, data); in ice_imem_npkb_init()
291 kb->flag0_ena = FIELD_GET(ICE_IM_PGKB_F0_ENA, data); in ice_imem_pgkb_init()
[all …]
/linux/drivers/bus/mhi/
H A Dcommon.h145 #define MHI_TRE_GET_CMD_CHID(tre) FIELD_GET(GENMASK(31, 24), MHI_TRE_GET_DWORD(tre, 1))
146 #define MHI_TRE_GET_CMD_TYPE(tre) FIELD_GET(GENMASK(23, 16), MHI_TRE_GET_DWORD(tre, 1))
155 #define MHI_TRE_GET_EV_CODE(tre) FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 0)))
156 #define MHI_TRE_GET_EV_LEN(tre) FIELD_GET(GENMASK(15, 0), (MHI_TRE_GET_DWORD(tre, 0)))
157 #define MHI_TRE_GET_EV_CHID(tre) FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 1)))
158 #define MHI_TRE_GET_EV_TYPE(tre) FIELD_GET(GENMASK(23, 16), (MHI_TRE_GET_DWORD(tre, 1)))
159 #define MHI_TRE_GET_EV_STATE(tre) FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 0)))
160 #define MHI_TRE_GET_EV_EXECENV(tre) FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 0)))
164 #define MHI_TRE_GET_EV_VEID(tre) FIELD_GET(GENMASK(23, 16), (MHI_TRE_GET_DWORD(tre, 0)))
165 #define MHI_TRE_GET_EV_LINKSPEED(tre) FIELD_GET(GENMASK(31, 24), (MHI_TRE_GET_DWORD(tre, 1)))
[all …]
/linux/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dmac.c12 #define to_rssi(field, rcpi) ((FIELD_GET(field, rcpi) - 220) / 2)
258 FIELD_GET(MT_DMA_PPE_CPU_REASON, info), in mt7915_wed_check_ppe()
259 FIELD_GET(MT_DMA_PPE_ENTRY, info)); in mt7915_wed_check_ppe()
314 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M; in mt7915_mac_fill_rx()
315 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1); in mt7915_mac_fill_rx()
345 if (FIELD_GET(MT_RXD1_NORMAL_SEC_MODE, rxd1) != 0 && in mt7915_mac_fill_rx()
352 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2); in mt7915_mac_fill_rx()
362 fc = cpu_to_le16(FIELD_GET(MT_RXD6_FRAME_CONTROL, v0)); in mt7915_mac_fill_rx()
363 qos_ctl = FIELD_GET(MT_RXD8_QOS_CTL, v2); in mt7915_mac_fill_rx()
364 seq_ctrl = FIELD_GET(MT_RXD8_SEQ_CTRL, v2); in mt7915_mac_fill_rx()
[all …]
/linux/drivers/net/can/ctucanfd/
H A Dctucanfd_base.c151 #define CTU_CAN_FD_TXTNF(priv) (!!FIELD_GET(REG_STATUS_TXNF, ctucan_read32(priv, CTUCANFD_STATUS)))
152 #define CTU_CAN_FD_ENABLED(priv) (!!FIELD_GET(REG_MODE_ENA, ctucan_read32(priv, CTUCANFD_MODE)))
184 u16 device_id = FIELD_GET(REG_DEVICE_ID_DEVICE_ID, in ctucan_reset()
655 if (FIELD_GET(REG_FRAME_FORMAT_W_IDE, ffw)) in ctucan_read_rx_frame()
661 if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw)) { in ctucan_read_rx_frame()
662 if (FIELD_GET(REG_FRAME_FORMAT_W_BRS, ffw)) in ctucan_read_rx_frame()
664 if (FIELD_GET(REG_FRAME_FORMAT_W_ESI_RSV, ffw)) in ctucan_read_rx_frame()
666 } else if (FIELD_GET(REG_FRAME_FORMAT_W_RTR, ffw)) { in ctucan_read_rx_frame()
670 wc = FIELD_GET(REG_FRAME_FORMAT_W_RWCNT, ffw) - 3; in ctucan_read_rx_frame()
673 if (FIELD_GET(REG_FRAME_FORMAT_W_DLC, ffw) <= 8) { in ctucan_read_rx_frame()
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_guc_relay.c304 guc_hxg_type_to_string(FIELD_GET(GUC_HXG_MSG_0_TYPE, msg[0])), in relay_send_transaction()
315 guc_hxg_type_to_string(FIELD_GET(GUC_HXG_MSG_0_TYPE, buf[0])), in relay_send_transaction()
316 FIELD_GET(GUC_HXG_REQUEST_MSG_0_ACTION, buf[0]), in relay_send_transaction()
319 guc_hxg_type_to_string(FIELD_GET(GUC_HXG_MSG_0_TYPE, msg[0])), in relay_send_transaction()
430 type = FIELD_GET(GUC_HXG_MSG_0_TYPE, msg[0]); in relay_send_message_and_wait()
431 action = FIELD_GET(GUC_HXG_REQUEST_MSG_0_ACTION, msg[0]); in relay_send_message_and_wait()
432 data0 = FIELD_GET(GUC_HXG_REQUEST_MSG_0_DATA0, msg[0]); in relay_send_message_and_wait()
500 relay_assert(relay, FIELD_GET(GUC_HXG_MSG_0_ORIGIN, msg[0]) == GUC_HXG_ORIGIN_HOST); in relay_send_to()
501 relay_assert(relay, guc_hxg_type_is_action(FIELD_GET(GUC_HXG_MSG_0_TYPE, msg[0]))); in relay_send_to()
510 switch (FIELD_GET(GUC_HXG_MSG_0_TYPE, msg[0])) { in relay_send_to()
[all …]
H A Dxe_gt_sriov_pf_monitor.c85 xe_gt_assert(gt, FIELD_GET(GUC_HXG_MSG_0_ORIGIN, msg[0]) == GUC_HXG_ORIGIN_GUC); in xe_gt_sriov_pf_monitor_process_guc2pf()
86 xe_gt_assert(gt, FIELD_GET(GUC_HXG_MSG_0_TYPE, msg[0]) == GUC_HXG_TYPE_EVENT); in xe_gt_sriov_pf_monitor_process_guc2pf()
87 xe_gt_assert(gt, FIELD_GET(GUC_HXG_EVENT_MSG_0_ACTION, msg[0]) == in xe_gt_sriov_pf_monitor_process_guc2pf()
93 if (unlikely(FIELD_GET(GUC2PF_ADVERSE_EVENT_EVENT_MSG_0_MBZ, msg[0]))) in xe_gt_sriov_pf_monitor_process_guc2pf()
99 vfid = FIELD_GET(GUC2PF_ADVERSE_EVENT_EVENT_MSG_1_VFID, msg[1]); in xe_gt_sriov_pf_monitor_process_guc2pf()
100 threshold = FIELD_GET(GUC2PF_ADVERSE_EVENT_EVENT_MSG_2_THRESHOLD, msg[2]); in xe_gt_sriov_pf_monitor_process_guc2pf()
/linux/drivers/net/ethernet/netronome/nfp/nfpcore/
H A Dnfp_nsp_eth.c142 dst->eth_index = FIELD_GET(NSP_ETH_PORT_INDEX, port); in nfp_eth_port_translate()
146 dst->lanes = FIELD_GET(NSP_ETH_PORT_LANES, port); in nfp_eth_port_translate()
148 dst->enabled = FIELD_GET(NSP_ETH_STATE_ENABLED, state); in nfp_eth_port_translate()
149 dst->tx_enabled = FIELD_GET(NSP_ETH_STATE_TX_ENABLED, state); in nfp_eth_port_translate()
150 dst->rx_enabled = FIELD_GET(NSP_ETH_STATE_RX_ENABLED, state); in nfp_eth_port_translate()
152 rate = nfp_eth_rate2speed(FIELD_GET(NSP_ETH_STATE_RATE, state)); in nfp_eth_port_translate()
155 dst->interface = FIELD_GET(NSP_ETH_STATE_INTERFACE, state); in nfp_eth_port_translate()
156 dst->media = FIELD_GET(NSP_ETH_STATE_MEDIA, state); in nfp_eth_port_translate()
160 dst->label_port = FIELD_GET(NSP_ETH_PORT_PHYLABEL, port); in nfp_eth_port_translate()
161 dst->label_subport = FIELD_GET(NSP_ETH_PORT_LABEL, port); in nfp_eth_port_translate()
[all …]
/linux/drivers/dpll/zl3073x/
H A Dchan.h82 return FIELD_GET(ZL_DPLL_MODE_REFSEL_MODE, chan->mode_refsel); in zl3073x_chan_mode_get()
93 return FIELD_GET(ZL_DPLL_MODE_REFSEL_REF, chan->mode_refsel); in zl3073x_chan_ref_get()
129 return FIELD_GET(ZL_DPLL_REF_PRIO_REF_P, val); in zl3073x_chan_ref_prio_get()
131 return FIELD_GET(ZL_DPLL_REF_PRIO_REF_N, val); in zl3073x_chan_ref_prio_get()
172 return FIELD_GET(ZL_DPLL_MON_STATUS_STATE, chan->mon_status); in zl3073x_chan_lock_state_get()
243 return !!FIELD_GET(ZL_DPLL_MON_STATUS_HO_READY, chan->mon_status); in zl3073x_chan_is_ho_ready()
254 return FIELD_GET(ZL_DPLL_REFSEL_STATUS_STATE, chan->refsel_status); in zl3073x_chan_refsel_state_get()
265 return FIELD_GET(ZL_DPLL_REFSEL_STATUS_REFSEL, chan->refsel_status); in zl3073x_chan_refsel_ref_get()
/linux/drivers/edac/
H A Dal_mc_edac.c84 ce_count = FIELD_GET(AL_MC_ECC_ERR_COUNT_CE, eccerrcnt); in handle_ce()
100 rank = FIELD_GET(AL_MC_ECC_CE_ADDR0_RANK, ecccaddr0); in handle_ce()
101 row = FIELD_GET(AL_MC_ECC_CE_ADDR0_ROW, ecccaddr0); in handle_ce()
103 bg = FIELD_GET(AL_MC_ECC_CE_ADDR1_BG, ecccaddr1); in handle_ce()
104 bank = FIELD_GET(AL_MC_ECC_CE_ADDR1_BANK, ecccaddr1); in handle_ce()
105 column = FIELD_GET(AL_MC_ECC_CE_ADDR1_COLUMN, ecccaddr1); in handle_ce()
129 ue_count = FIELD_GET(AL_MC_ECC_ERR_COUNT_UE, eccerrcnt); in handle_ue()
145 rank = FIELD_GET(AL_MC_ECC_UE_ADDR0_RANK, eccuaddr0); in handle_ue()
146 row = FIELD_GET(AL_MC_ECC_UE_ADDR0_ROW, eccuaddr0); in handle_ue()
148 bg = FIELD_GET(AL_MC_ECC_UE_ADDR1_B in handle_ue()
[all...]
H A Dbluefield_edac.c207 serr = FIELD_GET(MLXBF_SYNDROM__SERR, dram_syndrom); in bluefield_gather_report_ecc()
208 derr = FIELD_GET(MLXBF_SYNDROM__DERR, dram_syndrom); in bluefield_gather_report_ecc()
209 syndrom = FIELD_GET(MLXBF_SYNDROM__SYN, dram_syndrom); in bluefield_gather_report_ecc()
223 err_prank = FIELD_GET(MLXBF_ADD_INFO__ERR_PRANK, dram_additional_info); in bluefield_gather_report_ecc()
266 single_error_count = FIELD_GET(MLXBF_ECC_CNT__SERR_CNT, ecc_count); in bluefield_edac_check()
267 double_error_count = FIELD_GET(MLXBF_ECC_CNT__DERR_CNT, ecc_count); in bluefield_edac_check()
304 if (!FIELD_GET(MLXBF_DIMM_INFO__SIZE_GB, smc_info)) { in bluefield_edac_init_dimms()
313 if (FIELD_GET(MLXBF_DIMM_INFO__IS_NVDIMM, smc_info)) in bluefield_edac_init_dimms()
315 else if (FIELD_GET(MLXBF_DIMM_INFO__IS_LRDIMM, smc_info)) in bluefield_edac_init_dimms()
317 else if (FIELD_GET(MLXBF_DIMM_INFO__IS_RDIMM, smc_info)) in bluefield_edac_init_dimms()
[all …]
/linux/drivers/iio/magnetometer/
H A Dyamaha-yas530.c255 val = FIELD_GET(GENMASK(14, 3), val); in yas530_extract_axis()
270 val = FIELD_GET(GENMASK(14, 2), val); in yas532_extract_axis()
327 val = FIELD_GET(GENMASK(14, 6), val); in yas530_measure()
341 val = FIELD_GET(GENMASK(14, 5), val); in yas530_measure()
404 xy1y2[0] = FIELD_GET(GENMASK(13, 0), get_unaligned_be16(&data[2])); in yas537_measure()
806 c->a2 = FIELD_GET(GENMASK_ULL(63, 58), val) - 32; in yas530_extract_calibration()
807 c->a3 = FIELD_GET(GENMASK_ULL(57, 54), val) - 8; in yas530_extract_calibration()
808 c->a4 = FIELD_GET(GENMASK_ULL(53, 48), val) - 32; in yas530_extract_calibration()
809 c->a5 = FIELD_GET(GENMASK_ULL(47, 42), val) + 38; in yas530_extract_calibration()
810 c->a6 = FIELD_GET(GENMASK_ULL(41, 36), val) - 32; in yas530_extract_calibration()
[all …]
/linux/drivers/iommu/amd/
H A Dnested.c27 u32 gpt_level = FIELD_GET(DTE_GPT_LEVEL_MASK, gdte->dte[2]); in validate_gdte_nested()
30 if (FIELD_GET(DTE_MODE_MASK, gdte->dte[0]) != 0 || in validate_gdte_nested()
31 FIELD_GET(DTE_HOST_TRP, gdte->dte[0]) != 0) in validate_gdte_nested()
35 if (FIELD_GET(DTE_FLAG_V, gdte->dte[0]) == 1 && in validate_gdte_nested()
36 FIELD_GET(DTE_FLAG_GV, gdte->dte[0]) == 1 && in validate_gdte_nested()
37 FIELD_GET(DTE_GCR3_14_12, gdte->dte[0]) == 0 && in validate_gdte_nested()
38 FIELD_GET(DTE_GCR3_30_15, gdte->dte[1]) == 0 && in validate_gdte_nested()
39 FIELD_GET(DTE_GCR3_51_31, gdte->dte[1]) == 0) in validate_gdte_nested()
48 if (FIELD_GET(DTE_GLX, gdte->dte[0]) == 3) in validate_gdte_nested()
122 ndom->gdom_id = FIELD_GET(DTE_DOMID_MASK, ndom->gdte.dte[1]); in amd_iommu_alloc_domain_nested()
/linux/drivers/perf/
H A Dcxl_pmu.c138 freeze_for_enable = FIELD_GET(CXL_PMU_CAP_WRITEABLE_WHEN_FROZEN, val) && in cxl_pmu_parse_caps()
139 FIELD_GET(CXL_PMU_CAP_FREEZE, val); in cxl_pmu_parse_caps()
145 info->num_counters = FIELD_GET(CXL_PMU_CAP_NUM_COUNTERS_MSK, val) + 1; in cxl_pmu_parse_caps()
146 info->counter_width = FIELD_GET(CXL_PMU_CAP_COUNTER_WIDTH_MSK, val); in cxl_pmu_parse_caps()
147 info->num_event_capabilities = FIELD_GET(CXL_PMU_CAP_NUM_EVN_CAP_REG_SUP_MSK, val) + 1; in cxl_pmu_parse_caps()
149 info->filter_hdm = FIELD_GET(CXL_PMU_CAP_FILTERS_SUP_MSK, val) & CXL_PMU_FILTER_HDM; in cxl_pmu_parse_caps()
150 info->filter_crb = FIELD_GET(CXL_PMU_CAP_FILTERS_SUP_MSK, val) & in cxl_pmu_parse_caps()
152 if (FIELD_GET(CXL_PMU_CAP_INT, val)) in cxl_pmu_parse_caps()
153 info->irq = FIELD_GET(CXL_PMU_CAP_MSI_N_MSK, val); in cxl_pmu_parse_caps()
165 if (FIELD_GET(CXL_PMU_COUNTER_CFG_TYPE_MSK, val) == in cxl_pmu_parse_caps()
[all …]
H A Darm_spe_pmu.c698 if (!FIELD_GET(PMBSR_EL1_S, pmbsr)) in arm_spe_pmu_buf_get_fault_act()
705 if (FIELD_GET(PMBSR_EL1_DL, pmbsr)) in arm_spe_pmu_buf_get_fault_act()
710 if (FIELD_GET(PMBSR_EL1_COLL, pmbsr)) in arm_spe_pmu_buf_get_fault_act()
714 switch (FIELD_GET(PMBSR_EL1_EC, pmbsr)) { in arm_spe_pmu_buf_get_fault_act()
728 switch (FIELD_GET(PMBSR_EL1_BUF_BSC_MASK, pmbsr)) { in arm_spe_pmu_buf_get_fault_act()
842 if ((FIELD_GET(PMSFCR_EL1_FE, reg)) && in arm_spe_pmu_event_init()
846 if ((FIELD_GET(PMSFCR_EL1_FnE, reg)) && in arm_spe_pmu_event_init()
850 if ((FIELD_GET(PMSFCR_EL1_FT, reg)) && in arm_spe_pmu_event_init()
854 if ((FIELD_GET(PMSFCR_EL1_FL, reg)) && in arm_spe_pmu_event_init()
858 if ((FIELD_GET(PMSFCR_EL1_LDm, reg) || in arm_spe_pmu_event_init()
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_dcb.c25 *status = FIELD_GET(I40E_PRTDCB_GENS_DCBX_STATUS_MASK, reg); in i40e_get_dcbx_status()
54 etscfg->willing = FIELD_GET(I40E_IEEE_ETS_WILLING_MASK, buf[offset]); in i40e_parse_ieee_etscfg_tlv()
55 etscfg->cbs = FIELD_GET(I40E_IEEE_ETS_CBS_MASK, buf[offset]); in i40e_parse_ieee_etscfg_tlv()
56 etscfg->maxtcs = FIELD_GET(I40E_IEEE_ETS_MAXTC_MASK, buf[offset]); in i40e_parse_ieee_etscfg_tlv()
70 priority = FIELD_GET(I40E_IEEE_ETS_PRIO_1_MASK, buf[offset]); in i40e_parse_ieee_etscfg_tlv()
72 priority = FIELD_GET(I40E_IEEE_ETS_PRIO_0_MASK, buf[offset]); in i40e_parse_ieee_etscfg_tlv()
123 priority = FIELD_GET(I40E_IEEE_ETS_PRIO_1_MASK, buf[offset]); in i40e_parse_ieee_etsrec_tlv()
125 priority = FIELD_GET(I40E_IEEE_ETS_PRIO_0_MASK, buf[offset]); in i40e_parse_ieee_etsrec_tlv()
167 dcbcfg->pfc.willing = FIELD_GET(I40E_IEEE_PFC_WILLING_MASK, buf[0]); in i40e_parse_ieee_pfccfg_tlv()
168 dcbcfg->pfc.mbc = FIELD_GET(I40E_IEEE_PFC_MBC_MASK, buf[0]); in i40e_parse_ieee_pfccfg_tlv()
[all …]
/linux/include/linux/usb/
H A Dtypec_dp.h72 #define DP_CAP_DP_SIGNALLING(_cap_) FIELD_GET(GENMASK(5, 2), _cap_)
78 #define DP_CAP_DFP_D_PIN_ASSIGN(_cap_) FIELD_GET(GENMASK(15, 8), _cap_)
79 #define DP_CAP_UFP_D_PIN_ASSIGN(_cap_) FIELD_GET(GENMASK(23, 16), _cap_)
86 #define DP_CAP_CABLE_TYPE(_cap_) FIELD_GET(GENMASK(29, 28), _cap_)
121 #define DP_CONF_GET_PIN_ASSIGN(_conf_) FIELD_GET(GENMASK(15, 8), _conf_)
/linux/drivers/net/wireless/mediatek/mt76/mt7996/
H A Deeprom.c72 *path = FIELD_GET(MT_EE_WIFI_CONF2_TX_PATH_BAND1, in mt7996_eeprom_parse_stream()
74 *rx_path = FIELD_GET(MT_EE_WIFI_CONF3_RX_PATH_BAND1, in mt7996_eeprom_parse_stream()
76 *nss = FIELD_GET(MT_EE_WIFI_CONF5_STREAM_NUM_BAND1, in mt7996_eeprom_parse_stream()
80 *path = FIELD_GET(MT_EE_WIFI_CONF2_TX_PATH_BAND2, in mt7996_eeprom_parse_stream()
82 *rx_path = FIELD_GET(MT_EE_WIFI_CONF4_RX_PATH_BAND2, in mt7996_eeprom_parse_stream()
84 *nss = FIELD_GET(MT_EE_WIFI_CONF5_STREAM_NUM_BAND2, in mt7996_eeprom_parse_stream()
88 *path = FIELD_GET(MT_EE_WIFI_CONF1_TX_PATH_BAND0, in mt7996_eeprom_parse_stream()
90 *rx_path = FIELD_GET(MT_EE_WIFI_CONF3_RX_PATH_BAND0, in mt7996_eeprom_parse_stream()
92 *nss = FIELD_GET(MT_EE_WIFI_CONF4_STREAM_NUM_BAND0, in mt7996_eeprom_parse_stream()
274 val = FIELD_GET(MT_EE_WIFI_CONF1_BAND_SEL, val); in mt7996_eeprom_parse_band_config()
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