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Searched refs:DRAMSpeed (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_mode_vba_util_32.h695 const double DRAMSpeed);
701 const double DRAMSpeed);
H A Ddcn32_fpu.c1637 context->bw_ctx.bw.dcn.clk.dramclk_khz = (int)(context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16); in dcn32_calculate_dlg_params()
2283 double dram_speed_from_validation = context->bw_ctx.dml.vba.DRAMSpeed; in dcn32_calculate_wm_and_dlg_fpu()
2289 unsigned int min_dram_speed_mts = (unsigned int)context->bw_ctx.dml.vba.DRAMSpeed; in dcn32_calculate_wm_and_dlg_fpu()
3586 if (context->bw_ctx.dml.vba.DRAMSpeed <= dc->clk_mgr->bw_params->clk_table.entries[0].memclk_mhz * 16 &&
3588 context->bw_ctx.dml.vba.DRAMSpeed = dc->clk_mgr->bw_params->clk_table.entries[1].memclk_mhz * 16;
3589 context->bw_ctx.bw.dcn.clk.dramclk_khz = (int)(context->bw_ctx.dml.vba.DRAMSpeed * 1000 / 16);
H A Ddisplay_mode_vba_32.c545 mode_lib->vba.DRAMSpeed); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
555 dml_print("DML::%s: mode_lib->vba.DRAMSpeed = %f\n", __func__, mode_lib->vba.DRAMSpeed); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3748 mode_lib->vba.DRAMSpeed = mode_lib->vba.DRAMSpeedPerState[mode_lib->vba.VoltageLevel]; in dml32_ModeSupportAndSystemConfigurationFull()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_vba.h435 double DRAMSpeed; member
H A Ddisplay_mode_vba.c382 mode_lib->vba.DRAMSpeed = soc->clock_limits[i].dram_speed_mts; in fetch_socbb_params()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core.c5882 dml_float_t DRAMSpeed) in dml_get_return_dram_bw_mbps()
5887 DRAMSpeed * soc->num_chans * soc->dram_channel_width_bytes * in DSCDelayRequirement()
5894 dml_print("DML::%s: DRAMSpeed = %f\n", __func__, DRAMSpeed); in DSCDelayRequirement()
5908 dml_float_t DRAMSpeed) in DSCDelayRequirement()
5913 dml_float_t IdealDRAMBandwidth = DRAMSpeed * soc->num_chans * soc->dram_channel_width_bytes; in DSCDelayRequirement()
5934 dml_print("DML::%s: DRAMSpeed = %f\n", __func__, DRAMSpeed); in DSCDelayRequirement()
5951 dml_float_t DRAMSpeed) in CalculateVActiveBandwithSupport()
5954 dml_float_t IdealDRAMBandwidth = DRAMSpeed * so in CalculateVActiveBandwithSupport()
5790 dml_get_return_bw_mbps_vm_only(const struct soc_bounding_box_st * soc,dml_bool_t use_ideal_dram_bw_strobe,dml_bool_t HostVMEnable,dml_float_t DCFCLK,dml_float_t FabricClock,dml_float_t DRAMSpeed) dml_get_return_bw_mbps_vm_only() argument
5816 dml_get_return_bw_mbps(const struct soc_bounding_box_st * soc,dml_bool_t use_ideal_dram_bw_strobe,dml_bool_t HostVMEnable,dml_float_t DCFCLK,dml_float_t FabricClock,dml_float_t DRAMSpeed) dml_get_return_bw_mbps() argument
5859 dml_get_return_dram_bw_mbps(const struct soc_bounding_box_st * soc,dml_bool_t use_ideal_dram_bw_strobe,dml_bool_t HostVMEnable,dml_float_t DRAMSpeed) dml_get_return_dram_bw_mbps() argument
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H A Ddisplay_mode_core_structs.h832 dml_float_t DRAMSpeed; /// <brief Basically just the clock freq at the min (or given) state member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1160 context->bw_ctx.bw.dcn.clk.dramclk_khz = (int)(context->bw_ctx.dml.vba.DRAMSpeed * 1000.0 / 16.0); in dcn20_calculate_dlg_params()